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Fault Tolerant QCA Logic Design With Coupled Majority-Minority Gate
| International Journal of Computer Applications |
| Foundation of Computer Science (FCS), NY, USA |
| Volume 1 - Number 29 |
| Year of Publication: 2010 |
| Authors: Mamata Dalui, Bibhash Sen, Biplab k Sikdar |
10.5120/596-645
|
Mamata Dalui, Bibhash Sen, Biplab k Sikdar . Fault Tolerant QCA Logic Design With Coupled Majority-Minority Gate. International Journal of Computer Applications. 1, 29 ( February 2010), 81-87. DOI=10.5120/596-645
Abstract
Synthesis of efficient DFT (Design for Testability) logic is of prime importance in robustly testable design of QCA based logic circuits. An ingenious universal QCA gate structure, Coupled Majority-Minority (CMVMIN) gate, realizes majority and minority functions simultaneously in its 2-outputs. This device enables area saving implementation of complex QCA logic. In the current work, we investigate cost effective DFT for QCA designs realized with CMVMIN. The fault effects at the gate outputs due to cell deposition and cell misplacement defects are characterized for concurrent testable circuit design. The effective use of unutilized outputs of CMVMIN gates, realizing a circuit, leads to the proposed fault tolerant design that may not be possible with the conventional gate structures.
References
- A. O. Orlov, I. Amlani, G. H. Bernstein, C. S. Lent and G. L. Snider, `Realization of a functional cell for quantum-dot cellular automata,' Science, Vol. 277, pp. 928-930, 1997.
- B. Sen and B. K. Sikdar, `A study on defect tolerance of tiles implementing universal gate functions', in Proceedings of IEEE DTIS'07, Rabat, Morocco, Sept 2007, pp. 13-18.
- B. Sen and B. K. Sikdar, `Characterization of universal Nand-Nor-Inverter QCA gate', in Proceedings of 11th IEEE VLSI Design and Test Symposium, kolkata, August 8-11, 2007, pp. 433-442
- C. S. Lent, B. Isakson, and M. Lieberman, `Molecular quantum-dot cellular automata,' J. Amer. Chem. Soc., Vol. 125, pp. 1056-1063, 2003.
- C. S. Lent, P. D. Taugaw, W.Porod, and G. H. Bernstein, `Quantum cellular automata,' Nanotechnology, Vol.4, pp. 49- 57, 1993.
- D. Berzon and T. J. Fountain, `A memory design in QCAs using the SQUARES formalism', in Proceedings of Great Lakes Symposium on VLSI, pp. 166-169, 1999.
- I. Amlani, A. O. Orlov, G. Toth, C. S. Lent, G. H. Bernstein and G. L. Snider, `Digital logic gate using quantum-dot cellular automata,' Applied Physics Letters, Vol. 74, pp. 2875, 1999.
- J. Huang, M. Momenzadeh, L. Schiano and F. Lombardi, `Simulation-based design of modular QCA circuits', in Proceedings of IEEE conference on nanotechnology, Nagoya, 2005.
- K. Walus et. al., `ATIPS laboratory QCADesigner home-page,' http://www.atips.ca/projects/qcadesigner, ATIPS laboratory, Univ. of Calgary, Canada, 2002.
- M. B. Tahoori, J. Huang, M. Momenzadeh and F. Lombardi, `Characterization, test, and logic synthesis of And-Or-inverter (AOI) gate design for QCA implementation', IEEE TCAD, Vol. 24, No 12, December 2005; pp. 1881- 1893.
- M. B. Tahoori, J. Huang, M. Momenzadeh and F. Lombardi, `Testing of quantum cellular automata,' IEEE Transactions on Nanotechnology, Vol. 3, No 4, pp. 432-442, December 2004.
- P. D. Taugaw, C.S.Lent, `Logical device implementation using quantum cellular automata,' J. of Applied Physics, Vol. 75, pp. 1818, 1994.
- S. Ditti, K. Mahata, P. Mitra and B. K. Sikdar `Defect Characterization in Coupled Majority-Minority QCA Gate', DTIS, 2009.
- S. Ditti, P. K. Bhattacharya, P. Mitra and B. K. Sikdar `Logic Realization with Coupled QCA Majority-Minority Gate', VDAT, 2008.
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