Call for Paper - January 2023 Edition
IJCA solicits original research papers for the January 2023 Edition. Last date of manuscript submission is December 20, 2022. Read More

Implementation of Complex Matrix Inversion using Gauss-Jordan Elimination Method in Verilog

International Journal of Computer Applications
© 2015 by IJCA Journal
Volume 122 - Number 3
Year of Publication: 2015
P. Venkata Rao
K. R. K. Sastry

P.venkata Rao and K.r.k.sastry. Article: Implementation of Complex Matrix Inversion using Gauss-Jordan Elimination Method in Verilog. International Journal of Computer Applications 122(3):6-9, July 2015. Full text available. BibTeX

	author = {P.venkata Rao and K.r.k.sastry},
	title = {Article: Implementation of Complex Matrix Inversion using Gauss-Jordan Elimination Method in Verilog},
	journal = {International Journal of Computer Applications},
	year = {2015},
	volume = {122},
	number = {3},
	pages = {6-9},
	month = {July},
	note = {Full text available}


It gives the architecture of an optimized complex matrix inversion using GAUSS-JORDAN (GJ) elimination in Verilog with single precision floating-point representation. The GJ-elimination algorithm uses a single precision floating point arithmetic components and control unit for performing necessary arithmetic operations. The proposed architecture implements the GJ-elimination algorithm for complex matrix element sequentially. Matrix inversion using GJ-elimination improves the frequency when compared with QR Decomposition algorithm. The design is targeted on XC5VLX50T Xilinx FPGA.


  • Marjan Karkooti, Joseph R. Cavallaro,"FPGA Implementation Of Matrix Inversion Using QRD-RLS algorithm", IEEE, 2005.
  • Davide Cescato, Moritz Borgmann, Helmut Bölcskei, Jan Hansen, and Andreas Burg," Interpolation-based QR decomposition in MIMO-OFDM systems," IEEE Workshop on Signal Processing Advances in Wireless Communications- SPAWC, 2005.
  • Zheng-Yu Huang and pei-Yun Tsai," Efficient Implementation of QR Decomposition for Gigabit MIMO-OFDM systems," IEEE Trans. on circuits and systems, October 2011.
  • Ali Irturk, Bridget Benson, Shahnam Mirzaei, Ryan Kastner," An FPGA Design Space Exploration Tool for Matrix Inversion Architectures," SASP 2008.
  • Janier Arias-Garc? ia, Ricardo Pezzuol Jacobi, Carlos H. Llanos, Mauricio Ayala-Rinc? on," A suitable FPGA implementation of floating point matrix inversion based on Gauss-Jordan Elimination," 2011 vii southern conference on programmable logic (SPL), April 2011.
  • A. Burian, J. Takala and M. Ylinen, "A fixed point implementation of matrix inversion using Cholesky decomposition," Micro-NanoMechatronics and Human Science, 2003 IEEE International Symposium on,vol. 3,pp. 1431-1434 Vol. 3, 27-30 Dec. 2003.
  • A. Happonen, O. Piirainen and A. Burian, "GSM channel estimator using a fixed point matrix inversion algorithm," Signals, Circuits and Systems, 2005. ISSCS 2005. International Symposium on , vol. 1, no. , pp. 119-122 Vol. 1, 14-15 July 2005.