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Area Efficient High Speed Vedic Multiplier using Common Boolean Logic

by Nikita Jain, Jitendra Jain, Krishna Kant Nayak
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 132 - Number 2
Year of Publication: 2015
Authors: Nikita Jain, Jitendra Jain, Krishna Kant Nayak
10.5120/ijca2015907308

Nikita Jain, Jitendra Jain, Krishna Kant Nayak . Area Efficient High Speed Vedic Multiplier using Common Boolean Logic. International Journal of Computer Applications. 132, 2 ( December 2015), 46-48. DOI=10.5120/ijca2015907308

@article{ 10.5120/ijca2015907308,
author = { Nikita Jain, Jitendra Jain, Krishna Kant Nayak },
title = { Area Efficient High Speed Vedic Multiplier using Common Boolean Logic },
journal = { International Journal of Computer Applications },
issue_date = { December 2015 },
volume = { 132 },
number = { 2 },
month = { December },
year = { 2015 },
issn = { 0975-8887 },
pages = { 46-48 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume132/number2/23570-2015907308/ },
doi = { 10.5120/ijca2015907308 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T23:28:48.932684+05:30
%A Nikita Jain
%A Jitendra Jain
%A Krishna Kant Nayak
%T Area Efficient High Speed Vedic Multiplier using Common Boolean Logic
%J International Journal of Computer Applications
%@ 0975-8887
%V 132
%N 2
%P 46-48
%D 2015
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Abstract-In the advanced digital technology the need is of high speed in real time system along with the improvement in implementation issue. Vedic Multipliers has been used to solve the typical and tedious engineering calculation by simple Vedic methods. Here in this paper we have proposed the Vedic multiplier with Common Boolean Logic adder to improve the propagation delay time and area on silicon chip. With this slight improve in the multiplier, great results have been achieved in signal processing tasks. The VM has been designed for the target device XC3S400 -5 PQ208.

References
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Index Terms

Computer Science
Information Sciences

Keywords

FIR filters Common Boolean Logic (CBL) Vedic Multiplier Digital Signal Processing.

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