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Reseach Article

Design of Input Vector Monitoring Concurrent BIST based Architecture for 4-Bit Multiplier

by Vinay Kumar Pathak, Vinod Kumar Pathak
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 153 - Number 5
Year of Publication: 2016
Authors: Vinay Kumar Pathak, Vinod Kumar Pathak
10.5120/ijca2016912055

Vinay Kumar Pathak, Vinod Kumar Pathak . Design of Input Vector Monitoring Concurrent BIST based Architecture for 4-Bit Multiplier. International Journal of Computer Applications. 153, 5 ( Nov 2016), 19-24. DOI=10.5120/ijca2016912055

@article{ 10.5120/ijca2016912055,
author = { Vinay Kumar Pathak, Vinod Kumar Pathak },
title = { Design of Input Vector Monitoring Concurrent BIST based Architecture for 4-Bit Multiplier },
journal = { International Journal of Computer Applications },
issue_date = { Nov 2016 },
volume = { 153 },
number = { 5 },
month = { Nov },
year = { 2016 },
issn = { 0975-8887 },
pages = { 19-24 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume153/number5/26399-2016912055/ },
doi = { 10.5120/ijca2016912055 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T23:58:19.606016+05:30
%A Vinay Kumar Pathak
%A Vinod Kumar Pathak
%T Design of Input Vector Monitoring Concurrent BIST based Architecture for 4-Bit Multiplier
%J International Journal of Computer Applications
%@ 0975-8887
%V 153
%N 5
%P 19-24
%D 2016
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Input vector monitoring in associate with the BIST testing schemes perform testing during the normal operation of the taken circuit without imposing the circuit to be set in offline to perform the test.Testing should authenticate correctness of design and the test procedure. When a new chip is designed and fabricated for the first time, the testing may even take place in the design laboratory rather than in a factory and it frequently needs the participation of the design engineer. IVM-BIST is the best method to perform testing even in offline mode. The proposed method usually used by designers of the systems to check the corrected data received or not. So the fabricated chips first tested before it received by the customer to ensure the quality of the output. This is also known as acceptance testing (or inspection testing) and is conducted either by the user or for the user by some independent testing house. While testing, a part of the circuit (having the fault) is replaced with a corresponding redundant circuit part (by re-adjusting connections), in case any fault is found. BIST is testing a circuit every time before they startup. This paper presents central concepts of testing of VLSI circuits by BIST.

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Index Terms

Computer Science
Information Sciences

Keywords

Built-in self-test Design for testability Error Detection Input Vector Monitoring Off-Line Testing On-Line Testing Pre-Computed Test Set Self Testing.