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Reseach Article

Performance Evaluation of AES algorithm on Supercomputer IMAN1

by Sanad AbuRass, Mohammad Qatawneh
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 179 - Number 48
Year of Publication: 2018
Authors: Sanad AbuRass, Mohammad Qatawneh
10.5120/ijca2018917282

Sanad AbuRass, Mohammad Qatawneh . Performance Evaluation of AES algorithm on Supercomputer IMAN1. International Journal of Computer Applications. 179, 48 ( Jun 2018), 32-34. DOI=10.5120/ijca2018917282

@article{ 10.5120/ijca2018917282,
author = { Sanad AbuRass, Mohammad Qatawneh },
title = { Performance Evaluation of AES algorithm on Supercomputer IMAN1 },
journal = { International Journal of Computer Applications },
issue_date = { Jun 2018 },
volume = { 179 },
number = { 48 },
month = { Jun },
year = { 2018 },
issn = { 0975-8887 },
pages = { 32-34 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume179/number48/29503-2018917282/ },
doi = { 10.5120/ijca2018917282 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-07T00:58:42.856029+05:30
%A Sanad AbuRass
%A Mohammad Qatawneh
%T Performance Evaluation of AES algorithm on Supercomputer IMAN1
%J International Journal of Computer Applications
%@ 0975-8887
%V 179
%N 48
%P 32-34
%D 2018
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Advanced Encryption Standard (AES) is one of the most popular encryption algorithms. The algorithm uses a combination of Exclusive-OR operations (XOR), octet substitution with an S-box, row and column rotations, and a Mix Column. In this paper the parallel implementation of AES cryptography algorithm is evaluated and compared in terms of running time, speed up and parallel efficiency. The parallel implementation of AES is implemented using message passing interface (MPI) library, and the results have been conducted using IMAN1 Supercomputer. The experimental results show that the run time of AES algorithm is decreased as the number of processors is increased. Moreover, the speedup for the data size of 16, 32, 64, 128, 256, and 1024-KB is increased when the number of processors is equal to 2, 4, 8, and 16.

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Index Terms

Computer Science
Information Sciences

Keywords

AES Encryption MPI Supercomputer Parallel Computing.