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Hierarchical Synthesis of Approximate Multiplier Design for Field-programmable Gate Arrays (FPGA)-CSRmesh System

by Yunxiang Zhang, Xiaokun Yang, Lei Wu, Archit Gajjar, Han He
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 180 - Number 17
Year of Publication: 2018
Authors: Yunxiang Zhang, Xiaokun Yang, Lei Wu, Archit Gajjar, Han He
10.5120/ijca2018916380

Yunxiang Zhang, Xiaokun Yang, Lei Wu, Archit Gajjar, Han He . Hierarchical Synthesis of Approximate Multiplier Design for Field-programmable Gate Arrays (FPGA)-CSRmesh System. International Journal of Computer Applications. 180, 17 ( Feb 2018), 1-7. DOI=10.5120/ijca2018916380

@article{ 10.5120/ijca2018916380,
author = { Yunxiang Zhang, Xiaokun Yang, Lei Wu, Archit Gajjar, Han He },
title = { Hierarchical Synthesis of Approximate Multiplier Design for Field-programmable Gate Arrays (FPGA)-CSRmesh System },
journal = { International Journal of Computer Applications },
issue_date = { Feb 2018 },
volume = { 180 },
number = { 17 },
month = { Feb },
year = { 2018 },
issn = { 0975-8887 },
pages = { 1-7 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume180/number17/29021-2018916380/ },
doi = { 10.5120/ijca2018916380 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-07T01:00:53.503481+05:30
%A Yunxiang Zhang
%A Xiaokun Yang
%A Lei Wu
%A Archit Gajjar
%A Han He
%T Hierarchical Synthesis of Approximate Multiplier Design for Field-programmable Gate Arrays (FPGA)-CSRmesh System
%J International Journal of Computer Applications
%@ 0975-8887
%V 180
%N 17
%P 1-7
%D 2018
%I Foundation of Computer Science (FCS), NY, USA
Abstract

This paper presents a novel hierarchical synthesis for approximating field-programmable gate array (FPGA) based adders and multipliers. Our proposed work implements the multiplier design with the following contributions: 1) providing four types of single-bit approximate adders to cover a wide range of energy-quality tradeoffs, 2) presenting many approximations of multipliers by employing the single-bit adders, 3) substituting corresponding bits of the approximate multiplier by considering the quality constrains of the results. The novel hierarchical synthesis of the approach has been integrated into our prior project, an FPGA-IoTmesh system in the field of fog computing for hardware acceleration. Combining the merits of reconfigurability of FPGAs and long-distance connection of CSRmesh technology, this work creates a diverse range of applications such as approximate designs at the network edge, as well as showing a demo for Internet-of-Things (IoT) connections covering an entire building.

References
  1. J. Bornholt, T. Mytkowicz, and K. S. McKinley. Uncertain: A first order type for uncertain data. Proceedings of the 19th Intl. Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), pages 51–66, 2014.
  2. J. Bornholt, T. Mytkowicz, and K. S. McKinley. Uncertain: Abstractions for uncertain hardware and software. IEEE Micro, 35(3):132–143, 2015.
  3. V. Chippa, S. Chakradhar, and K. Roy. Analysis and characterization of inherent application resilience for approximate computing. ACM/EDAC/IEEE 50rd Design Automation Conference (DAC), 2013.
  4. E. S. Chung, A. Putnam, and A. M. Caulfield. A reconfigurable fabric for accelerating large-scale datacenter services. IEEE Micro, (3):10–22, 2015.
  5. H. Esmaeilzadeh, A. Sampson, and L. Ceze. Architecture support for disciplined approximate programming. ACM SIGPLAN Notices ASPLOS12, 47(4):301–312, 2012.
  6. M. Fan, Q. Han, and X. Yang. Energy minimization for online real-time scheduling with reliability awareness. Elsevier Journal of Systems and Software (Elsevier JSS), Vol. 127, PP. 168-176, May 2017.
  7. A. Gajjar, Y. Zhang, and X. Yang. Demo abstract: A smart building system integrated with an edge computing algorithm and iot mesh networks. 2017.
  8. H. He, L. Wu, and X. Yang. Dual long short-term memory networks for sub-character representation learning. The 15th Intl. Conference on Information Technology - New Generations (ITNG-2018), 2018.
  9. J. Huang, J. Lach, and G. Robins. A methodology for energyquality tradeoff using imprecise hardware. DAC 2012, pages 504–509, 2012.
  10. J.Han and M. Orshansky. Approximate computing: An emerging paradigm for energy-efficient design. IEEE ETS, 2013.
  11. P. Kulkarni, P. Gupta, and M. Ercegovac. Trading accuracy for power with an underdesigned multiplier architecture. 24th IEEE Intl. Conf. on VLSI Design, pages 346–351, 2011.
  12. J. Liang, J. Han, and F. Lombardi. New metrics for the reliability of approximate and probabilistic adders. IEEE Transactions on Computers, 62(9):1760–1771, 2013.
  13. S. Lu. Speeding up processing with approximation circuits. Computer, 37(3):67–73, 2004.
  14. J. Miao, K. He, A. Gerstlauer, and M. Orshansky. Modeling and synthesis of quality-energy optimal approximate adders. ICCAD 2012, pages 728–735, 2012.
  15. S. Misailovic, M. Carbin, S. Achour, and Z. Qi. Chisel: Reliability- and accuracy-aware optimization of approximate computational kernels. Proceedings of the 2014 ACM Intl Conference on Object Oriented Programming Systems Languages and Applications (OOPSLA), pages 309–328, 2014.
  16. A. K. Mishra, R. Barik, and S. Paul. iact: A softwarehardware framework for understanding the scope of approximate computing. Workshop on Approximate Computing Across the System Stack (WACAS), 2014.
  17. R. Nair. Big data needs approximate computing: Technical perspective. ACM Communications, (1):58–104, 2015.
  18. G. Pekhimenko, D. Koutra, and K. Qian. Approximate computing: Application analysis and hardware design. www.cs.cmu.edu/ gpekhime/Projects/15740/paper.pdf.
  19. A Putnam, A. M. Caulfield, and E. S. Chung. A cloud-scale acceleration architecture. 2016 49th Annual IEEE/ACM Intel. Symposium on Microarchitecture (MICRO), pages 506–511, oct. 2016.
  20. M. Shafique, R. Hafiz, and S. Rehman. Cross-layer approximate computing: From logic to architectures. ACM/EDAC/IEEE 53rd Design Automation Conference (DAC), 2016.
  21. J. Thota, P. Vangali, and X. Yang. Prototyping an autonomous eye-controlled system (aecs) using raspberry-pi on wheelchairs. Intl. Journal of Compt. Applications (IJCA), 158(8):1–7, 2017.
  22. X. Yang and J. Andrian. A high performance on-chip bus (msbus) design and verification. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. (TVLSI), 23(7):1350–1354, July 2015.
  23. X. Yang and X. He. Demo abstract: Establishing a ble mesh network with fabricated csrmesh devices. The Second ACM/IEEE Symposium on Edge Computing (SEC), July 2017.
  24. X. Yang and W. Wen. Design of a pre-scheduled data bus (dbus) for advanced encryption standard (aes) encrypted system-on-chips (socs). The 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), pages 506–511, Jan 2017.
  25. X. Yang, W. Wen, and M. Fan. Improving aes core performance via an advanced ibus protocol. ACM Journal on Emerging Technologies in Computing, 14(1):61–63, Jan 2018.
  26. X. Yang, N. Wu, and J. Andrian. Comparative power analysis of an adaptive bus encoding method on the mbus structure. Journal of VLSI Design, 2017:1–7, May 2017.
Index Terms

Computer Science
Information Sciences

Keywords

Approximate designs field-programmable gate array (FPGA) fog computing Internet-of-Things (IoT)

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