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Low Power Variable gain amplifier with Bandwidth of 80–300 MHz using for Sigma-Delta analogue to digital converter in Wireless Sensor Receiver

by Radwene Laajimi, Nawfil Gueddah, Mohamed Masmoudi
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 43 - Number 8
Year of Publication: 2012
Authors: Radwene Laajimi, Nawfil Gueddah, Mohamed Masmoudi
10.5120/6126-8344

Radwene Laajimi, Nawfil Gueddah, Mohamed Masmoudi . Low Power Variable gain amplifier with Bandwidth of 80–300 MHz using for Sigma-Delta analogue to digital converter in Wireless Sensor Receiver. International Journal of Computer Applications. 43, 8 ( April 2012), 35-37. DOI=10.5120/6126-8344

@article{ 10.5120/6126-8344,
author = { Radwene Laajimi, Nawfil Gueddah, Mohamed Masmoudi },
title = { Low Power Variable gain amplifier with Bandwidth of 80–300 MHz using for Sigma-Delta analogue to digital converter in Wireless Sensor Receiver },
journal = { International Journal of Computer Applications },
issue_date = { April 2012 },
volume = { 43 },
number = { 8 },
month = { April },
year = { 2012 },
issn = { 0975-8887 },
pages = { 35-37 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume43/number8/6126-8344/ },
doi = { 10.5120/6126-8344 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T20:32:55.668515+05:30
%A Radwene Laajimi
%A Nawfil Gueddah
%A Mohamed Masmoudi
%T Low Power Variable gain amplifier with Bandwidth of 80–300 MHz using for Sigma-Delta analogue to digital converter in Wireless Sensor Receiver
%J International Journal of Computer Applications
%@ 0975-8887
%V 43
%N 8
%P 35-37
%D 2012
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Variable-gain amplifier (VGA) is one of the basic building blocks of many communication systems. In this paper we present a novel structure of VGA with 22 db of gain range and 220 MHz of bandwidth frequency variation. This circuit combines a voltage to current (V-I) converter and two-stage CMOS amplifier to achieve programmable gain and bandwidth . The gain is varied by changing the input voltage (Vin) from -1V to 0V. The maximum bandwidth is about 300 MHz. The gain can be varied from 38 dB to 60 dB in 1 dB gain steps. The overall circuit draws current from 10µA to 150µA at ±1. 5V power supply. The noise figure of the system at maximum gain is 18dB, and the third-order intermodulation intercept point (IIP3) at minimum gain is -8 dBm. Simulations results with static and dynamic behaviour is presented and validated with the technology AMS 0. 35µm. Eventually we have also succeeded in reducing the static power consumption to 0. 5 mW.

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Index Terms

Computer Science
Information Sciences

Keywords

Radio Frequency Receiver Vga Cmos Analog Integrated Circuits Cmos Ota Design

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