CFP last date
20 May 2024
Reseach Article

Performance Evaluation of MISISFET- TCAD Simulation

by Tarun Chaudhary, Gargi Khanna, Rajeevan Chandel
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 47 - Number 19
Year of Publication: 2012
Authors: Tarun Chaudhary, Gargi Khanna, Rajeevan Chandel
10.5120/7300-0568

Tarun Chaudhary, Gargi Khanna, Rajeevan Chandel . Performance Evaluation of MISISFET- TCAD Simulation. International Journal of Computer Applications. 47, 19 ( June 2012), 45-49. DOI=10.5120/7300-0568

@article{ 10.5120/7300-0568,
author = { Tarun Chaudhary, Gargi Khanna, Rajeevan Chandel },
title = { Performance Evaluation of MISISFET- TCAD Simulation },
journal = { International Journal of Computer Applications },
issue_date = { June 2012 },
volume = { 47 },
number = { 19 },
month = { June },
year = { 2012 },
issn = { 0975-8887 },
pages = { 45-49 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume47/number19/7300-0568/ },
doi = { 10.5120/7300-0568 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T20:42:20.091301+05:30
%A Tarun Chaudhary
%A Gargi Khanna
%A Rajeevan Chandel
%T Performance Evaluation of MISISFET- TCAD Simulation
%J International Journal of Computer Applications
%@ 0975-8887
%V 47
%N 19
%P 45-49
%D 2012
%I Foundation of Computer Science (FCS), NY, USA
Abstract

A novel device n-MISISFET with a 'dielectric stack' instead of the single insulator of n-MOSFET has been described and its characteristics has been obtained in this paper. The desired variation of threshold voltage is obtained with biasing for the novel n-MISISFET for various substrate doping concentrations, the effect temperature variation on various electrical characteristics is studied in the paper. The variation of electric field with substrate doping is also studied in this paper. The device is based on the principle of resonant tunneling diode (RTD).

References
  1. J. R. Brews, W. Fichtner, E. H. Nicollian, and S. M. Sze, "Generalized guide for MOSFET miniaturization", IEEE Electron Dev. Lett. , vol. 1, p. 2-4, 1980.
  2. R. H. Dennard , "Design of ion-implanted MOSFET's with very small physical dimensions", IEEE J. Solid-State Circuits, vol. SSC-9, pp. 256-268, May 1974.
  3. Y. Taur and T. H. Ning, Fundamentals of Modern VLSI Devices, Cambridge, U. K. : Cambridge Univ. Press, 1998.
  4. B. S. Doyle, " High Performance fully depleted tri-gate CMOS transistors", IEEE Electron Device Lett. , vol. 24,pp. 263-265, Apr. 2003.
  5. Wen-Chin Lee and Chenming Hu, "Modeling CMOS Tunneling Currents Through Ultrathin Gate Oxide Due to Conduction-Band and Valence Band Electron and Hole Tunneling", IEEE Transactions on Electron Devices, vol. 48, No. 7, July 2001.
  6. M. Watanabe , "Systematic variation of negative differential resistance characteristics of CdF2/CaF2 Resonant Tunneling Diode on Si(111) grown by Nanoarea Local Epitaxy", 2nd Int. Workshop on Quantum Nonplanar Nanostructures & Nanoelectronics, June 2002.
  7. C. T. Chuang , "Scaling planner silicon devices", IEEE Circuits & Device Magazine, pp. 6-18, Jan/Feb 2004.
  8. A. Sarkar and T. K. Bhattacharyya, "Gate Leakage Current in MISISFET", International Conference on MEMS and Semiconductor Nanotechnology, India, p. Dec 2005.
  9. A. Sarkar and T. K. Bhattacharyya, "MISISFET: A Device with an Advanced Dielectric structure", IEEE Conference on Emerging Technologies-Nano electronics, Singapore, pp 413-417, Jan 2006.
  10. K. Schuegraf and C. Hu, Hole Injection SiO2 Breakdown Model for very Low Voltage Lifetime Extrapolation, IEEE Trans On Elec Dev, vol. 41, No 5, May 1994.
  11. Sung-Mo Kang and Y. Leblebici, "CMOS Digital Integrated Circuits analysis and design", 3rd edition.
  12. "Sentaurus Structure Editor User's Manual", Synopsys International.
  13. "Sentaurus Inspect User's Manual", Synopsys International
Index Terms

Computer Science
Information Sciences

Keywords

N-misisfet N-mosfet Rtd.