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Hardware Description of Multi-Directional Fast Sobel Edge Detection Processor by VHDL for Implementing on FPGA

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International Journal of Computer Applications
© 2012 by IJCA Journal
Volume 47 - Number 25
Year of Publication: 2012
Authors:
Arash Nosrat
Yousef S. Kavian
10.5120/7533-9872

Arash Nosrat and Yousef S Kavian. Article: Hardware Description of Multi-Directional Fast Sobel Edge Detection Processor by VHDL for Implementing on FPGA. International Journal of Computer Applications 47(25):1-7, June 2012. Full text available. BibTeX

@article{key:article,
	author = {Arash Nosrat and Yousef S. Kavian},
	title = {Article: Hardware Description of Multi-Directional Fast Sobel Edge Detection Processor by VHDL for Implementing on FPGA},
	journal = {International Journal of Computer Applications},
	year = {2012},
	volume = {47},
	number = {25},
	pages = {1-7},
	month = {June},
	note = {Full text available}
}

Abstract

The VHDL is an appropriate Hardware Description Language (HDL) for providing hardware models of practical image processing algorithms. The aim of this paper is to present hardware architecture of Sobel edge detection algorithm for implementing on field programmable gate array (FPGA) chips. The proposed architecture calculates the edges of gray scale images in four directions; vertical, horizontal, right diagonal and left diagonal. Simulation results and synthesizing proposed Sobel edge detection processor on Xilinx Spartan3 XC3S200 FPGA chip demonstrate the efficiency of proposed architecture for edge detecting of gray scale 1024×1024 images for real-time image processing applications.

References

  • Gonzalez, R. C. and Woods, R. E. 2003. Digital Image Processing.
  • Wolf, W. 2004. FPGA-Based System Design. Englewood Cliffs, NJ: Prentice- Hall.
  • Roth, H. C. , 2004. Circuit Design with VHDL. Cambridge, MA: MIT Press.
  • Baese, U. M. 2007. Digital Signal Processing With Field Programmable Gate Arrays, Springer, 2007.
  • Nguyen, D. , Halupka, D. , Aarabi, P. and Sheikholeslami, A. 2006. Real-Time Face Detection and Lip Feature Extraction Using Field-Programmable Gate Arrays. IEEE Transactions on Systems, Man, and Cybernetics-Part B: Cybernetics, 902-912.
  • Wu, J. , Sun, J. and Liu, W. 2010. Design and Implementation of Video Image edge Detection System Based on FPGA. In Proceedings of 3rd IEEE International Congress on Image and Signal Processing.
  • He, W. and Yuan, K. 2008. An Improved Canny Edge Detector and Its Realization on FPGA. In Proceedings of 7th IEEE World Congress on Intelligent Control and Automation.
  • Haque, M. N. 2010. Implementation of a FPGA based Architecture of Prewitt Edge detection Algorithm using Verilog HDL. In Proceedings of Conference on Electronic and Telecommunication.
  • Guo?Z. , Xu, W. and Chai, Z. 2010. Image Edge Detection Based on FPGA. In Proceedings of Ninth IEEE International Symposium on Distributed Computing and Applications to Business, Engineering and Science.
  • Abbasi, T. A. and Abbasi, M. U. 2007. A novel FPGA-based architecture for Sobel edge detection operator. International Journal of Electronics, Taylor & Francis, 889–896.
  • Yasri, I. , Hamid, N. H. and Yap, V. V. 2008. Performance Analysis of FPGA Based Sobel Edge Detection Operator. International Conference on Electronic Design.
  • www. xilinx. com