Hardware Description of Multi-Directional Fast Sobel Edge Detection Processor by VHDL for Implementing on FPGA
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10.5120/7533-9872 |
Arash Nosrat and Yousef S Kavian. Article: Hardware Description of Multi-Directional Fast Sobel Edge Detection Processor by VHDL for Implementing on FPGA. International Journal of Computer Applications 47(25):1-7, June 2012. Full text available. BibTeX
@article{key:article,
author = {Arash Nosrat and Yousef S. Kavian},
title = {Article: Hardware Description of Multi-Directional Fast Sobel Edge Detection Processor by VHDL for Implementing on FPGA},
journal = {International Journal of Computer Applications},
year = {2012},
volume = {47},
number = {25},
pages = {1-7},
month = {June},
note = {Full text available}
}
Abstract
The VHDL is an appropriate Hardware Description Language (HDL) for providing hardware models of practical image processing algorithms. The aim of this paper is to present hardware architecture of Sobel edge detection algorithm for implementing on field programmable gate array (FPGA) chips. The proposed architecture calculates the edges of gray scale images in four directions; vertical, horizontal, right diagonal and left diagonal. Simulation results and synthesizing proposed Sobel edge detection processor on Xilinx Spartan3 XC3S200 FPGA chip demonstrate the efficiency of proposed architecture for edge detecting of gray scale 1024×1024 images for real-time image processing applications.
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