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Reseach Article

A Framework of an Internet Firewall for IPv6 using FPGA

by Gouri Shankar Prajapati, Nilay Khare
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 50 - Number 21
Year of Publication: 2012
Authors: Gouri Shankar Prajapati, Nilay Khare
10.5120/7927-1211

Gouri Shankar Prajapati, Nilay Khare . A Framework of an Internet Firewall for IPv6 using FPGA. International Journal of Computer Applications. 50, 21 ( July 2012), 22-24. DOI=10.5120/7927-1211

@article{ 10.5120/7927-1211,
author = { Gouri Shankar Prajapati, Nilay Khare },
title = { A Framework of an Internet Firewall for IPv6 using FPGA },
journal = { International Journal of Computer Applications },
issue_date = { July 2012 },
volume = { 50 },
number = { 21 },
month = { July },
year = { 2012 },
issn = { 0975-8887 },
pages = { 22-24 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume50/number21/7927-1211/ },
doi = { 10.5120/7927-1211 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T20:49:10.762433+05:30
%A Gouri Shankar Prajapati
%A Nilay Khare
%T A Framework of an Internet Firewall for IPv6 using FPGA
%J International Journal of Computer Applications
%@ 0975-8887
%V 50
%N 21
%P 22-24
%D 2012
%I Foundation of Computer Science (FCS), NY, USA
Abstract

As the communication via internet is growing very fast, network security becoming the essential need of an organization or user. it include protecting data from unauthorized access, protecting data from damage and implementing policies and procedures for network security breaches and data losses. Due to exhaustion problem of IPv4 addresses we will soon switch over IPv6. To solve this problem we are presenting a Framework of a firewall for IPv6 and IPv4 networks using a field-programmable gate array (FPGA). The FPGA implements, the accept or deny rules of the firewall in Hardware using Verilog Hardware Description Language. A hardware based firewall offers the advantages of speed over a software firewall, in addition to direct interfacing with network devices, such as an Ethernet. This firewall would have the ability to process the data packets based on source and destination TCP/UDP port number, source and destination IPv4 and IPv6 address, and combination of source IP address, and destination port number. Incoming and outgoing IPv6 packets addresses first converted into IPv4 addresses for filtering decisions.

References
  1. Ayman Kayssi, Louis Harik, Rony Ferzli, Mohammad Fawaz," FPGA-BASED INTERNET PROTOCOL FIREWALL CHIP" 0-7803-6542-9/00 IEEE 2000
  2. Darrell Laturnas, Ron Bolton, "Dynamic Silicon Firewall", CCECE/CCGEI , IEEE 2005
  3. Rajanish K. Kamat, Pawan K. Gaikwad, Santosh A. Shinde, "Implementation of FPGA based Firewall Using Behavioral Synthesis", IJCSNS International Journal of Computer Science and Network Security, VOL. 10 No. 6, June 2010
  4. Arief Wicaksana, Arif Sasongko, "Fast and Reconfigurable Packet Classification Engine in FPGA-Based Firewall", International Conference on Electrical Engineering and Informatics, 978-1-4577-0752-0/11 IEEE 2011
  5. Raouf Ajami, Anh Dinh, "Embedded Network Firewall on FPGA", Eighth International Conference on Information Technology: New Generations IEEE 2011
Index Terms

Computer Science
Information Sciences

Keywords

Firewall IP FPGA Protocol ROM Packet