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Reseach Article

Reconfigurable Design of Rectangular to Polar Converter using Linear Convergence

by Anurag Vijay Agrawal, Rajesh Mehra
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 50 - Number 5
Year of Publication: 2012
Authors: Anurag Vijay Agrawal, Rajesh Mehra
10.5120/7768-0847

Anurag Vijay Agrawal, Rajesh Mehra . Reconfigurable Design of Rectangular to Polar Converter using Linear Convergence. International Journal of Computer Applications. 50, 5 ( July 2012), 23-27. DOI=10.5120/7768-0847

@article{ 10.5120/7768-0847,
author = { Anurag Vijay Agrawal, Rajesh Mehra },
title = { Reconfigurable Design of Rectangular to Polar Converter using Linear Convergence },
journal = { International Journal of Computer Applications },
issue_date = { July 2012 },
volume = { 50 },
number = { 5 },
month = { July },
year = { 2012 },
issn = { 0975-8887 },
pages = { 23-27 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume50/number5/7768-0847/ },
doi = { 10.5120/7768-0847 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T20:47:32.225693+05:30
%A Anurag Vijay Agrawal
%A Rajesh Mehra
%T Reconfigurable Design of Rectangular to Polar Converter using Linear Convergence
%J International Journal of Computer Applications
%@ 0975-8887
%V 50
%N 5
%P 23-27
%D 2012
%I Foundation of Computer Science (FCS), NY, USA
Abstract

In recent years, the growth of multimedia services and applications in digital data transmission has led to ever increasing demands of effective data transmission over the wired as well as wireless communication systems. Since digital communication systems need to deal with multimode and multiband operations on complex signals many-a-times, there is always a requirement of an efficient method for rapid phase and magnitude extraction. The proposed Rectangular to Polar Converter (RPC) has been implemented using fully parallel CORDIC, a Linear Convergence Algorithm, in vectoring mode. The design is synthesized with ISE 10. 1 software, and implemented on 2v3000fg676-4. Synthesis results show that the design is able to work at 177. 620 MHz with less hardware requirements.

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Index Terms

Computer Science
Information Sciences

Keywords

RPC CORDIC coordinate conversion vectoring mode atan2 FPGA