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High Speed and High Resolution Self Biased Differential Amplifier based Latch Comparator

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International Journal of Computer Applications
© 2013 by IJCA Journal
Volume 74 - Number 3
Year of Publication: 2013
Authors:
Shyam Singh
Ravi Kumar
K. S. Paraliya
10.5120/12863-9653

Shyam Singh, Ravi Kumar and K S Paraliya. Article: High Speed and High Resolution Self Biased Differential Amplifier based Latch Comparator. International Journal of Computer Applications 74(3):9-13, July 2013. Full text available. BibTeX

@article{key:article,
	author = {Shyam Singh and Ravi Kumar and K. S. Paraliya},
	title = {Article: High Speed and High Resolution Self Biased Differential Amplifier based Latch Comparator},
	journal = {International Journal of Computer Applications},
	year = {2013},
	volume = {74},
	number = {3},
	pages = {9-13},
	month = {July},
	note = {Full text available}
}

Abstract

In high speed ADC, comparator influences the overall performance of ADC directly. This paper describes a very high speed and high resolution preamplifier comparator. The comparator use a self biased differential amp to increase the output current sinking and sourcing capability. The threshold and width of the new comparator can be reduced to the millivolt (mV) range, the resolution and the dynamic characteristics are good. Based on UMC 0. 18um CMOS process model, simulated results show the comparator can work under a 25dB gain, 55MHz speed and 210. 10µW power .

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