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Design of Efficient Reversible Fault tolerant Adder/Subtractor

by Prashanth. N. G, Savitha. A. P, M. B. Anandaraju, Naveen. K. B
journal cover thumbnail

International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 74 - Number 9
Year of Publication: 2013
Authors: Prashanth. N. G, Savitha. A. P, M. B. Anandaraju, Naveen. K. B
10.5120/12913-9845

Prashanth. N. G, Savitha. A. P, M. B. Anandaraju, Naveen. K. B . Design of Efficient Reversible Fault tolerant Adder/Subtractor. International Journal of Computer Applications. 74, 9 ( July 2013), 23-28. DOI=10.5120/12913-9845

@article{ 10.5120/12913-9845,
author = { Prashanth. N. G, Savitha. A. P, M. B. Anandaraju, Naveen. K. B },
title = { Design of Efficient Reversible Fault tolerant Adder/Subtractor },
journal = { International Journal of Computer Applications },
issue_date = { July 2013 },
volume = { 74 },
number = { 9 },
month = { July },
year = { 2013 },
issn = { 0975-8887 },
pages = { 23-28 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume74/number9/12913-9845/ },
doi = { 10.5120/12913-9845 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T21:41:48.212878+05:30
%A Prashanth. N. G
%A Savitha. A. P
%A M. B. Anandaraju
%A Naveen. K. B
%T Design of Efficient Reversible Fault tolerant Adder/Subtractor
%J International Journal of Computer Applications
%@ 0975-8887
%V 74
%N 9
%P 23-28
%D 2013
%I Foundation of Computer Science (FCS), NY, USA
Abstract

In recent years, reversible logic is the most popular and emerging technology and it will be having wide applications in the field of Low power CMOS, quantum computing and optical computing. Circuits with reversible logic gates provide low power dissipation and low energy loss. This paper proposes the Adder/Subtractor designs that are used in many DSP applications. This paper proposes the efficient Adder/Subtractor design in terms of gate count, garbage outputs, constant inputs and quantum cost. The proposed circuits will simulated using ModelSim simulator and implemented on Xilinx FPGA platform.

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Index Terms

Computer Science
Information Sciences

Keywords

Reversible Logic Gates Full Adder/Subtractor Parallel Adder/Subtractor BCD Adder/Subtractor.

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