CFP last date
22 April 2024
Call for Paper
May Edition
IJCA solicits high quality original research papers for the upcoming May edition of the journal. The last date of research paper submission is 22 April 2024

Submit your paper
Know more
The week's pick
Responsive image
Enhancing Privacy Preservation: Multi-Attribute Protection with P-Sensitive K-Anonymity

Twinkle Patel Kiran Amin
Random Articles
Reseach Article

A Load Balancer for a Multi-Stage Router Architecture

by Shadi Atalla, andrea Bianco, Robert Birke, Luca Giraudo
journal cover thumbnail

International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 89 - Number 3
Year of Publication: 2014
Authors: Shadi Atalla, andrea Bianco, Robert Birke, Luca Giraudo
10.5120/15479-4193

Shadi Atalla, andrea Bianco, Robert Birke, Luca Giraudo . A Load Balancer for a Multi-Stage Router Architecture. International Journal of Computer Applications. 89, 3 ( March 2014), 1-7. DOI=10.5120/15479-4193

@article{ 10.5120/15479-4193,
author = { Shadi Atalla, andrea Bianco, Robert Birke, Luca Giraudo },
title = { A Load Balancer for a Multi-Stage Router Architecture },
journal = { International Journal of Computer Applications },
issue_date = { March 2014 },
volume = { 89 },
number = { 3 },
month = { March },
year = { 2014 },
issn = { 0975-8887 },
pages = { 1-7 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume89/number3/15479-4193/ },
doi = { 10.5120/15479-4193 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T22:08:16.024478+05:30
%A Shadi Atalla
%A andrea Bianco
%A Robert Birke
%A Luca Giraudo
%T A Load Balancer for a Multi-Stage Router Architecture
%J International Journal of Computer Applications
%@ 0975-8887
%V 89
%N 3
%P 1-7
%D 2014
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Multi-stage software router architectures permit to overcome several limitations inherent to single stage software routers. One of the key elements of the multi-stage architecture under study are the load balancers, which are used to distribute the load among backend routers. However, using a PC (Personal Computer) as a load balancer could create a performance bottleneck in the overall architecture. Since the operations performed by the load balancer are simple, we explore the possibility of an hardware-based implementation of load balancing functionality with the goal of improving its performance. In this paper, we describe the architecture of an FPGA-based load balancer and we present some performance results of its prototype implementation.

References
  1. Foundry serveriron load balancer.
  2. Hardware Load Balancer for Multi-Stage Software Router. http://opencores. org/project,loadbalancer.
  3. Microsofts network load balancing. http:// www. foundrynet. com/products/webswitches/ serveriron/.
  4. NetFPGA. http://www. netfpga. org/.
  5. Katerina Argyraki, Salman Baset, Byung-Gon Chun, Kevin Fall, Gianluca Iannaccone, Allan Knies, Eddie Kohler, Maziar Manesh, Sergiu Nedevschi, and Sylvia Ratnasamy. Can software routers scale? In PRESTO, Seattle, USA, Aug. 2008.
  6. Shadi Atalla, Andrea Bianco, Robert Birke, and Luca Giraudo. NetFPGA-based load balancer for a Multi-Stage router architecture. In International Conference on Computer Information Systems 2014 (ICCIS-2014), Hammamet, Tunisia, January 2014.
  7. Shadi Atalla, Davide Cuda, Paolo Giaccone, and Marco Pretti. Belief-propagation-assisted scheduling in inputqueued switches. IEEE Transactions on Computers, 62(10):2101–2107, 2013.
  8. A. Bianco, R. Birke, J. M. Finochietto, L. Giraudo, F. Marenco, M. Mellia, A. Khan, and D. Manjunath. Control and management plane in a multi-stage software router architecture. In HPSR, Shanghai, China, May 2008.
  9. A. Bianco, J. M. Finochietto, G. Galante, M. Mellia, D. Mazzucchi, and F. Neri. Scalable layer-2/layer-3 multistage switching architectures for software routers. In IEEE GLOBECOM, San Francisco, USA, Dec. 2006.
  10. A. Bianco, J. M. Finochietto, M. Mellia, F. Neri, and G. Galante. Multistage switching architectures for software routers. IEEE Network, 21(4):15–21, Jul. -Aug. 2007.
  11. Andrea Bianco, Robert Birke, Fikru Getachew Debele, and Luca Giraudo. Snmp management in a distributed software router architecture. In Communications (ICC), 2011 IEEE International Conference on, pages 1–5. IEEE, 2011.
  12. Andrea Bianco, Robert Birke, Luca Giraudo, and Nanfang Li. Multistage software routers in a virtual environment. In Global Telecommunications Conference (GLOBECOM 2010), 2010 IEEE, pages 1–5. IEEE, 2010.
  13. Raffaele Bolla and Roberto Bruschi. RFC 2544 performance evaluation and internal measurements for a Linux-based open router. In HPSR, Poznan, Poland, Jun. 2006.
  14. Raffaele Bolla and Roberto Bruschi. An effective forwarding architecture for SMP Linux routers. In IT-NEWS, Venice, Italy, Feb. 2008.
  15. Raffaele Bolla and Roberto Bruschi. PC-based software routers: High performance and application service support. In PRESTO, Seattle, USA, Aug. 2008.
  16. Mihai Dobrescu, Norbert Egi, Katerina Argyraki, Byung-Gon Chun, Kevin Fall, Gianluca Iannaccone, Allan Knies, Maziar Manesh, and Sylvia Ratnasamy. RouteBricks: exploiting parallelism to scale software routers. In SOSP, Big Sky, USA, Oct. 2009.
  17. Nikhil Handigol, Srinivasan Seetharaman, Nick McKeown, and Ramesh Johari. Plug-n-serve: Load-balancing web traffic using openflow, 2009.
  18. IETF. Forwarding and control element separation working group (ForCES). http://tools. ietf. org/wg/forces/.
  19. A. J. Khan, R. Birke, D. Manjunath, A. Sahoo, and A. Bianco. Distributed PC based routers: bottleneck analysis and architecture proposal. In HPSR, Shanghai, China, May 2008.
  20. Marc K¨orner, Herbert Almus, Hagen Woesner, and Tobias Jungel. Metrics and measurement tools in openflow and the ofelia testbed. In Measurement Methodology and Tools, pages 127–138. Springer, 2013.
  21. Ian Kuon, Russell Tessier, and Jonathan Rose. Fpga architecture: Survey and challenges. Foundations and Trends R in Electronic Design Automation, 2(2):135–253, 2008.
  22. David C. Plummer. RFC 826, ethernet address resolution protocol, Nov. 1982. http://www. ietf. org/rfc/rfc0826. txt.
  23. Q Xu, H Rastegarfar, Y Ben M'Sallem, A Leon-Garcia, S LaRochelle, and LA Rusch. Analysis of large-scale multistage all-optical packet switching routers. Optical Communications and Networking, IEEE/OSA Journal of, 4(5):412– 425, 2012.
Index Terms

Computer Science
Information Sciences

Keywords

Load Balancer

Powered by PhDFocusTM