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Reseach Article

An Optimized Circuit of 8:1 Multiplexer Circuit using Reversible Logic Gates

Published on March 2015 by O.p.singh, Vandana Shukla, G. R. Mishra, R. K.tiwari
International Conference on Communication, Computing and Information Technology
Foundation of Computer Science USA
ICCCMIT2014 - Number 3
March 2015
Authors: O.p.singh, Vandana Shukla, G. R. Mishra, R. K.tiwari
471ab4d0-abac-4b9f-ac68-7f8087701446

O.p.singh, Vandana Shukla, G. R. Mishra, R. K.tiwari . An Optimized Circuit of 8:1 Multiplexer Circuit using Reversible Logic Gates. International Conference on Communication, Computing and Information Technology. ICCCMIT2014, 3 (March 2015), 17-20.

@article{
author = { O.p.singh, Vandana Shukla, G. R. Mishra, R. K.tiwari },
title = { An Optimized Circuit of 8:1 Multiplexer Circuit using Reversible Logic Gates },
journal = { International Conference on Communication, Computing and Information Technology },
issue_date = { March 2015 },
volume = { ICCCMIT2014 },
number = { 3 },
month = { March },
year = { 2015 },
issn = 0975-8887,
pages = { 17-20 },
numpages = 4,
url = { /proceedings/icccmit2014/number3/19782-7028/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 International Conference on Communication, Computing and Information Technology
%A O.p.singh
%A Vandana Shukla
%A G. R. Mishra
%A R. K.tiwari
%T An Optimized Circuit of 8:1 Multiplexer Circuit using Reversible Logic Gates
%J International Conference on Communication, Computing and Information Technology
%@ 0975-8887
%V ICCCMIT2014
%N 3
%P 17-20
%D 2015
%I International Journal of Computer Applications
Abstract

Designing of reversible circuit has become the promising area for researchers. The designing of digital circuits using reversible logic should have zero power loss in ideal conditions. However in practical aspect, it does not occur. This paper illustrates an optimized 8:1 multiplexer circuit grounded on reversible logic using a combination of available reversible logic gates. The multiplexer is optimized on the basis of two parameters namely total number of reversible gates used in the design of the circuits and total garbage outputs generated. This circuit is more advantageous for further designing of any digital circuit with low power loss. The devices designed through this circuit would have better performance as compared to the existing circuits.

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Index Terms

Computer Science
Information Sciences

Keywords

Reversible Circuit Design Basic Reversible Gates Multiplexer Circuit.