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FPGA Implementation of Elevator Controller

IJCA Proceedings on International Conference on Emerging Trends in Technology and Applied Sciences
© 2015 by IJCA Journal
ICETTAS 2015 - Number 1
Year of Publication: 2015
Jillsmon Varghese
Linju Achu Philip
Shyni Susan Mammen
Yasha Miriam Thomas
Riboy Cheriyan

Jillsmon Varghese, Linju Achu Philip, Shyni Susan Mammen, Yasha Miriam Thomas and Riboy Cheriyan. Article: FPGA Implementation of Elevator Controller. IJCA Proceedings on International Conference on Emerging Trends in Technology and Applied Sciences ICETTAS 2015(1):5-8, September 2015. Full text available. BibTeX

	author = {Jillsmon Varghese and Linju Achu Philip and Shyni Susan Mammen and Yasha Miriam Thomas and Riboy Cheriyan},
	title = {Article: FPGA Implementation of Elevator Controller},
	journal = {IJCA Proceedings on International Conference on Emerging Trends in Technology and Applied Sciences},
	year = {2015},
	volume = {ICETTAS 2015},
	number = {1},
	pages = {5-8},
	month = {September},
	note = {Full text available}


In this modern era, elevators have become an integral part of any commercial or public complex. It facilitates the faster movement of people and luggage between floors. The elevator control system is one of the most important aspects in electronics control module that are used in automotive application. Usually elevators are designed for a specific building taking into account the main factors such as the height of the building, the number of people traveling to each floor and the expected periods of high usage. The elevator system is designed with different control strategies. This implementation is based on FPGA, which can be used for a building with any number of floors, with the specified inputs and outputs. This controller can be implemented for an elevator with the required number of floors by simply changing a control variable in the HDL code. This approach is based on an algorithm which reduces the amount of computation required, by focusing only on the relevant rules that improves the performance of the group of elevator system. The elevator controller was developed using Verilog HDL and was successfully implemented on a Xilinx Artix7 FPGA.


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