|International Conference on Advancements in Engineering and Technology (ICAET 2015)
|Foundation of Computer Science USA
|ICQUEST2015 - Number 1
|Authors: P.a.deshmukh, and Y.a.sadawarte
P.a.deshmukh, and Y.a.sadawarte . Pseudo-Random Number Generation by Fibonacci and Galois LFSR Implemented on FPGA. International Conference on Advancements in Engineering and Technology (ICAET 2015). ICQUEST2015, 1 (October 2015), 1-3.
Random Number Generator is an electronic circuit or it can be software or can be optimized architecture. In many practical applications such as cryptography, model simulation, sampling, games of chance, numerical analysis, there is a need of the generation of series of random number. This is achieved for ex. by means of tables, specific algorithms or electronic circuits. This Random number can be generated by either specific software or a FPGA based architectures. Field Programmable Gate Array (FPGA) optimized random number generator (RNG) are more resource efficient than software optimized RNG because they can take the advantage of bitwise operations and FPGA specific features. Hence for generation of random number, FPGA architecture is generally used. By using different FPGA platform, random number can be generated. There are several algorithms by which the random number has been generated. Each algorithm had used a different FPGA platform for generation of random number. In this paper generation of 8 bit random number by means of two method i. e Fibonacci series method and Galois liner feedback shift register method. Moreover for analysis Altera platform is used i. e. for simulation Modelsim software and for synthesis Quartus II software is used. Hence by using these two algorithms, random numbers have been generated and each algorithm has shown different performance parameters i. e. area, speed and power.