Serial Flash Analog to Digital Converter (ADC) is a topology which uses only N number of comparators for N bit ADC. The said converter is developed and implemented in CMOS for 6 bit resolution. The simulation results are presented for TSMC 0.35 um CMOS technology.

1. B. Yu and W. Black. Jr, “A 900MS/s 6b Interleaved CMOS Flash ADC,” IEEE Custom Integrated Circuits Conference, pp. 149–152, 2001
2. M Choi, and A. A. Abidi, “A 6b 1.3GSample/s A/D Con- verter in 0.35 m CMOS,” IEEE International Solid-State Circuits Conference, pp. 126–127, 2001
3. A. V. Bapat, A. M. Dighe, “An Asynchronous Serial Flash Converter” ICECS 2002. 9th IEEE International Conference on Electronics, Circuits and Systems, vol 1, pp 13-15, 2002
4. R. J. Baker, H.W. Li, D. E. Boyce, “CMOS Circuit, Layout, And Simulation” IEEE Press, 1998.
5. A. V. Bapat, Dr. A. S. Gandhi, Dr. A. M. Dighe, “Asynchronous Successive Approximation A/D Converter“ In proceeding of Fifth International Conference on Advanced A/D and D/A Conversion Techniques and their Applications (ADDA2005), 2005
6. Allier, G. Sicard, L. Fesquet, M. Renaudin "A New Class of Asynchronous A/D Converters Based on Time Quantization," in Proceedings of the Ninth International Symposium on Asynchronous Circuits and Systems (ASYNC’03),2003
7. A. M. Dighe, A. R. Kelkar, “Information Theoretic approach to ADC Circuits” IETE, Journal Vol 41, Pp325-328, .December 1995.

VLSI Fuzzy Logic FPGA VLSI PMOS NMOS ADC DAC