International Conference on VLSI, Communication & Instrumentation |
Foundation of Computer Science USA |
ICVCI - Number 16 |
None 2011 |
Authors: K.K.Nagarajan, N.Vinodhkumar, Dr.R.Srinivasan |
e7458f7a-b107-4801-84fb-7a29a02176bc |
K.K.Nagarajan, N.Vinodhkumar, Dr.R.Srinivasan . Effect of Underlap on 30 nm Gate Length FinFET Based LNA Using TCAD Simulations. International Conference on VLSI, Communication & Instrumentation. ICVCI, 16 (None 2011), 6-10.
The effect of gate – drain/source underlap ( Lun ) on a narrow band LNA performance has been studied , in 30 nm FinFET using device and mixed mode simulations. Studies are done by maintaining and not maintaining the leakage current (Ioff) of the various devices. LNA circuit with two transistors in a cascode arrangement is constructed and the input impedance, gain and noise-figure have been used as performance metrics. To get the better noise performance and gain, Lun in the range of 3-5nm is recommended.