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VLSI Implementation of Image Segmentation with Resource Optimized Adaptive Median Filter

Published on None 2011 by V. B. Baru., Chetan S. Deokar.
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International Conference on VLSI, Communication & Instrumentation
Foundation of Computer Science USA
ICVCI - Number 16
None 2011
Authors: V. B. Baru., Chetan S. Deokar.
a5c57b62-2f7c-4a95-9022-20d44bc530f8

V. B. Baru., Chetan S. Deokar. . VLSI Implementation of Image Segmentation with Resource Optimized Adaptive Median Filter. International Conference on VLSI, Communication & Instrumentation. ICVCI, 16 (None 2011), 14-17.

@article{
author = { V. B. Baru., Chetan S. Deokar. },
title = { VLSI Implementation of Image Segmentation with Resource Optimized Adaptive Median Filter },
journal = { International Conference on VLSI, Communication & Instrumentation },
issue_date = { None 2011 },
volume = { ICVCI },
number = { 16 },
month = { None },
year = { 2011 },
issn = 0975-8887,
pages = { 14-17 },
numpages = 4,
url = { /proceedings/icvci/number16/2749-1597/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 International Conference on VLSI, Communication & Instrumentation
%A V. B. Baru.
%A Chetan S. Deokar.
%T VLSI Implementation of Image Segmentation with Resource Optimized Adaptive Median Filter
%J International Conference on VLSI, Communication & Instrumentation
%@ 0975-8887
%V ICVCI
%N 16
%P 14-17
%D 2011
%I International Journal of Computer Applications
Abstract

FPGA (Field Programmable Gate Array) is utilized to realize the image segmentation. We describe a newfangled method for segmentation of 2-D imagery that uses resource optimized adaptive median filter for image enhancement. A pipelined implementation on FPGA for this algorithm is designed. Sobel operator is used for edge detection. Processed results of test images are presented to illustrate the performance capabilities of the proposed method. Comparison table and resource summaries are provided.

References
  1. Zdenek Vasicek, Lukas Sekanina, “Novel Hardware Implementation of Adaptive Median Filters”, 978-1-4244-2277-7.
  2. Miguel A. Vega-Rodríguez, Juan M. Sánchez-Pérez, Juan A. Gómez-Pulido, “An FPGA-based Implementation for Median Filter Meeting Real-time Requirements of Automated Visual Inspection Systems”, 10th Mediterranean Conference on Control and Automation - MED2002 Lisbon, Portugal, July 9-12, 2002.
  3. Hong Shan Neoh, Asher Hazanchuk, “Adaptive Edge Detection for Real-Time Video Processing using FPGAs, Altera Corporation, Innovation Drive.
  4. Chetan Deokar, Dhiraj M. Dhane, “FPGA based Implementation of Real-time Image Segmentation”, Journal of Software Engineering and Technology, International Sciences Press. ISSN: 0975-6159, vol.2 No.1 Jan-June 2010.
  5. Chetan Deokar, V. B. Baru., “VLSI based Implementation of Real-time Image Segmentation”, Proc. International Conference on Industrial Electronics, Control and Robotics (IECR10), NIT, Rourkela, Orissa, India, Dec.27-29, 2010.
Index Terms

Computer Science
Information Sciences

Keywords

VLSI FPGA Adaptive Median Filter (AMF) Image segmentation Median Sobel-operator Modified Adaptive Median Filter (MAMF)