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Reseach Article

Implementation of High Speed Convolution Algorithm on CUDA based Graphics Processing Unit

Published on September 2017 by G. Prasad Acharya, N. Srinivasa Reddy, S. P.v. Subba Rao
International Conference on Microelectronics, Circuits and System
Foundation of Computer Science USA
MICRO2016 - Number 1
September 2017
Authors: G. Prasad Acharya, N. Srinivasa Reddy, S. P.v. Subba Rao
6b602c46-e9e8-467c-adbe-dbca7a9f4073

G. Prasad Acharya, N. Srinivasa Reddy, S. P.v. Subba Rao . Implementation of High Speed Convolution Algorithm on CUDA based Graphics Processing Unit. International Conference on Microelectronics, Circuits and System. MICRO2016, 1 (September 2017), 26-30.

@article{
author = { G. Prasad Acharya, N. Srinivasa Reddy, S. P.v. Subba Rao },
title = { Implementation of High Speed Convolution Algorithm on CUDA based Graphics Processing Unit },
journal = { International Conference on Microelectronics, Circuits and System },
issue_date = { September 2017 },
volume = { MICRO2016 },
number = { 1 },
month = { September },
year = { 2017 },
issn = 0975-8887,
pages = { 26-30 },
numpages = 5,
url = { /proceedings/micro2016/number1/28439-6107/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 International Conference on Microelectronics, Circuits and System
%A G. Prasad Acharya
%A N. Srinivasa Reddy
%A S. P.v. Subba Rao
%T Implementation of High Speed Convolution Algorithm on CUDA based Graphics Processing Unit
%J International Conference on Microelectronics, Circuits and System
%@ 0975-8887
%V MICRO2016
%N 1
%P 26-30
%D 2017
%I International Journal of Computer Applications
Abstract

The advancements in multi processors based computers with parallel computing has increased the computational speed . The multi processors consists of hundreds of processor cores or graphics processing units are designed for multimedia applications to improve the pixel resolution . These processors are also used for general computations are called as General Processing GPU (GP-GPU) . The exploration of multi cores in CUDA (Compute Unified Device Architecture) led to parallel computation . CUDA C is a high level programming language released by NVIDIA in 2006 for its NVIDIA GPUs. In this paper a high speed convolution algorithm is implemented on CUDA based graphics processing unit. The implemented algorithm is evaluated based on computational speed. Simulation results shows that computational speed by GPU has been increased by many folds when compared with CPU.

References
  1. Bahri Hayt hem, Hallek Mohamed, Chouchene Marwa, Sayadi Fatma, Atri Mohamed," Fast Generalized Fourier Descriptor for object recognition of image using CUDA" 978-1-4799-2806-4/14 ©2014 IEEE
  2. Meirui Ren, Meihui Ren, Wei ping Zhang1t, Tao Wang, Ning Tian, linbao Li, Longjiang Guo,"An Implementation of the QR Iterations for Finding Eigenvalues of Matrices with CUDA on GPU",2013 International Conference on Mechatronic Sciences, Electric Engineering and Computer (MEC) Dec 20-22, 2013, Shenyang, China
  3. Xiaoxia Qi, Xiao Ma, Dou Li, Yuping Zhao. "Implementation of Accelerated BCH Decoders on GPU", 978-1-4799-0308-5/13/$31. 00 © 2013 IEEE.
  4. Mirgita Frasheri, Betim "The use of GPUs in image processing",2nd Mediterranean Coriference on Embedded Computing MECO – 2013.
  5. Yue Zhao and Francis C. M. Lau," Implementation of Decoders for LDPC Block Codes and LDPC Convolutional Codes Based on GPUs", IEEE transactions on parallel and distributed systems.
  6. Alexandros Papakonstantinou1,Karthik Gururaj , John A. Stratton1, Deming Chen1, Jason Cong ,Wen-Mei W. Hwu,"FCUDA: Enabling Efficient Compilation of CUDA Kernels onto FPGAs",2009 IEEE 7th Symposium on Application Specific Processors (SASP).
  7. Mohammad Nazmul Haque,Mohammad Shorif ,"Accelerating Fast Fourier Transformation for Image Processing using Graphics Processing Unit",Journal of Emerging Trends in Computing and Information Sciences Volume 2 No. 8, AUGUST 2011.
  8. Jing Wu, Joseph JaJa, Elias Balaras ,"An Optimized FFT-Based Direct Poisson Solver on CUDA GPUs". IEEE transactions on parallel and distributed systems, vol. 25, no. 3, march 2014.
  9. Ke Yan, Junming shan, Eryan Yang,"cuda-based acceleration of the jpeg decoder", 2013 Ninth International Conference on Natural Computation -(ICNC).
Index Terms

Computer Science
Information Sciences

Keywords

Cuda Gp-gpu dft convolution Cuda C