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Reseach Article

Design and Implementation of NOC based Parallel AES Computation

Published on December 2015 by Bharati S. Kerakalamatti, Nagaraj .p
National Conference on Power Systems and Industrial Automation
Foundation of Computer Science USA
NCPSIA2015 - Number 1
December 2015
Authors: Bharati S. Kerakalamatti, Nagaraj .p
f04fd37e-7768-49f6-b3e0-ff3efe63ad2c

Bharati S. Kerakalamatti, Nagaraj .p . Design and Implementation of NOC based Parallel AES Computation. National Conference on Power Systems and Industrial Automation. NCPSIA2015, 1 (December 2015), 1-4.

@article{
author = { Bharati S. Kerakalamatti, Nagaraj .p },
title = { Design and Implementation of NOC based Parallel AES Computation },
journal = { National Conference on Power Systems and Industrial Automation },
issue_date = { December 2015 },
volume = { NCPSIA2015 },
number = { 1 },
month = { December },
year = { 2015 },
issn = 0975-8887,
pages = { 1-4 },
numpages = 4,
url = { /proceedings/ncpsia2015/number1/23323-7210/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 National Conference on Power Systems and Industrial Automation
%A Bharati S. Kerakalamatti
%A Nagaraj .p
%T Design and Implementation of NOC based Parallel AES Computation
%J National Conference on Power Systems and Industrial Automation
%@ 0975-8887
%V NCPSIA2015
%N 1
%P 1-4
%D 2015
%I International Journal of Computer Applications
Abstract

In today's SOC, the number of processing cores is increasing with growth of VLSI technology. The on chip communication among multiple cores using NOC based architecture is effective than conventional bus based architecture, Since NOC has many advantages than bus based architecture mainly in terms of scalability (increase in number of nodes) and flexibility. Hence in this paper, Mesh based NOC architecture with packet switching is adopted for cryptography without virtual channel and pipelining techniques. The deterministic X-Y routing algorithm is used for routing a packet within the NOC. This paper presents a 10 -20% less area consumption NOC with AES as processing element , over previous work.

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Index Terms

Computer Science
Information Sciences

Keywords

Soc (system On Chip) Noc (network On Chip) Aes(advanced Encryption Standard) X-y Routing Algorithm.