Propagation Delay of CMOS circuit depends upon several parameters such as threshold voltage, supply voltage, cell size. Variation of threshold voltage may result in temperature inversion effect thus reducing the cell delay as temperature increases. Integrated circuits operating at scaled supply voltage consume low power at the cost of reduced speed. This paper presents the study of effect of temperature on propagation delay of LECTOR based NAND gate circuit and comparing that with conventional design for a temperature range 0f 25oC to 105oC.

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Leakage/Sub threshold current threshold voltage LECTOR circuit