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Reseach Article

Temperature Dependence of Propagation Delay Characteristic in LECTOR based CMOS Circuit

Published on December 2011 by Preeti Verma, R. A. Mishra
International Conference on Electronics, Information and Communication Engineering
Foundation of Computer Science USA
ICEICE - Number 6
December 2011
Authors: Preeti Verma, R. A. Mishra
531b3a89-b897-4817-891f-dac16fa4b262

Preeti Verma, R. A. Mishra . Temperature Dependence of Propagation Delay Characteristic in LECTOR based CMOS Circuit. International Conference on Electronics, Information and Communication Engineering. ICEICE, 6 (December 2011), 28-30.

@article{
author = { Preeti Verma, R. A. Mishra },
title = { Temperature Dependence of Propagation Delay Characteristic in LECTOR based CMOS Circuit },
journal = { International Conference on Electronics, Information and Communication Engineering },
issue_date = { December 2011 },
volume = { ICEICE },
number = { 6 },
month = { December },
year = { 2011 },
issn = 0975-8887,
pages = { 28-30 },
numpages = 3,
url = { /specialissues/iceice/number6/4310-iceice043/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Special Issue Article
%1 International Conference on Electronics, Information and Communication Engineering
%A Preeti Verma
%A R. A. Mishra
%T Temperature Dependence of Propagation Delay Characteristic in LECTOR based CMOS Circuit
%J International Conference on Electronics, Information and Communication Engineering
%@ 0975-8887
%V ICEICE
%N 6
%P 28-30
%D 2011
%I International Journal of Computer Applications
Abstract

Propagation Delay of CMOS circuit depends upon several parameters such as threshold voltage, supply voltage, cell size. Variation of threshold voltage may result in temperature inversion effect thus reducing the cell delay as temperature increases. Integrated circuits operating at scaled supply voltage consume low power at the cost of reduced speed. This paper presents the study of effect of temperature on propagation delay of LECTOR based NAND gate circuit and comparing that with conventional design for a temperature range 0f 25oC to 105oC.

References
  1. A. dasdan and I. hom, “Handling Inverted Temperature Dependence in Static Timing Analysis”, ACM Transactions on Design Automation of Electronic Systems, Vol. 11, No. 2, pp. 306–324,April 2006.
  2. N. Hanchate and N.Ranganathan,“LECTOR: A Technique for Leakage Reduction in CMOS Circuits”, IEEE Transactions on VLSI Systems, vol. 12, pp. 196-205, Feb., 2004
  3. N.Yasuda et al., “Analytical device models of SOI MOSFET’s including self heating”, Japan J. Appl. Phys.,Vol.30, pp.3677-3684,1991
  4. L.T. Su et. Al.,”SPICE model and parameters for fully depleted SOI MOSFET’S including self heating,” IEEE Electron Devices Letters,Vol.15,PP. 374-376, 1994
  5. B. Lasbouygues, R. Wilson, N. Azemard, and P. Maurine. Temperature- and voltage-aware timing analysis. IEEE Transactions on CAD, 26(4):801{815, Apr. 2007.
  6. A. Dasdan and I. Hom. Handling inverted temperature dependence in static timing analysis. ACM Trans. on Design
  7. R. Kumar and V. Kursun, “Reversed temperature-dependent propagation delay characteristics in nanometer CMOS circuits” IEEE Trans. on Circuits and Systems,53(10):1078{1082, Oct. 2006.
  8. A. Calimera, E Macii, R. I. Bahar, “Reducing Leakage Power by Accounting for Temperature Inversion Dependence in Dual-Vt Synthesized Circuits,” ISLPED’08, August 11–13, 2008, Bangalore, India
  9. T. Sakurai and A. R. Newton, “Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas’” IEEE Journal on Solid-State Circuits,25(2):584{594, Apr. 1990
  10. Sung H. Hong, Sang M.Nam, Byung O. Yun, Byung J. Lee, Chong G. Yu and Jong Y.Park, “Temperature Dependence of Hot Carrier Induced MOSFET Degradation at Loe Gate Bias,”Microelectronics Reliability 39 (1999) 809-814.M i
  11. M. Borkan and P. K. Weimer, “An analysis of the characteristics of insulated-gate thin-film transistors,” RCA Rev., vol. 24,pp. 153-165, June 1963.
  12. L. Vadasz and A. s. Grove, “Temperature Dependence of MOS Transistor Characteristics Below Saturation”, IEEE transaction on Electron Devices vol. ED-13, No. 12, December 1966.
  13. L.Vadasz, “the use of MOS structure for designing of high value resistors in monolithic integrated circuits,” IEEE Trans. on electronics devices, vol. ED-13, pp 459-465, May 1966.
  14. F. Fallah and Massoud Pedram, “Standby and Active Leakage Current Control and Minimization in CMOS VLSI Circuits ”, IEICE transactions on electronics, vol. 88, no.4, pp. 509-519, 2005.
  15. Y. Cheng et al.,“Modeling temperature effects of quarter micrometer MOSFETs in BSIMv3 for circuit simulation,” Semiconductor science and technology, Vol.12.pp. 1349-1354, 1997.
  16. J. H. Huang et al., BSIM3 Manual (Version 2.0),University of California, Berkeley, March 1994.
  17. Y. Cheng et al., BSIM3 Version 3.1 User’s manual, University of California, Berkeley, Memorandum No. UCB/ERL M97/2,1997.
Index Terms

Computer Science
Information Sciences

Keywords

Leakage/Sub threshold current threshold voltage LECTOR circuit