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Reseach Article

A Review of VLSI Structure for the Implementation of Matrix Multiplication

by Ruchi Thakkar, Paresh Rawat
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 123 - Number 4
Year of Publication: 2015
Authors: Ruchi Thakkar, Paresh Rawat
10.5120/ijca2015905298

Ruchi Thakkar, Paresh Rawat . A Review of VLSI Structure for the Implementation of Matrix Multiplication. International Journal of Computer Applications. 123, 4 ( August 2015), 38-42. DOI=10.5120/ijca2015905298

@article{ 10.5120/ijca2015905298,
author = { Ruchi Thakkar, Paresh Rawat },
title = { A Review of VLSI Structure for the Implementation of Matrix Multiplication },
journal = { International Journal of Computer Applications },
issue_date = { August 2015 },
volume = { 123 },
number = { 4 },
month = { August },
year = { 2015 },
issn = { 0975-8887 },
pages = { 38-42 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume123/number4/21951-2015905298/ },
doi = { 10.5120/ijca2015905298 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T23:11:49.372386+05:30
%A Ruchi Thakkar
%A Paresh Rawat
%T A Review of VLSI Structure for the Implementation of Matrix Multiplication
%J International Journal of Computer Applications
%@ 0975-8887
%V 123
%N 4
%P 38-42
%D 2015
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Matrix multiplication is the kernel operation used in many transform, image processing and digital signal processing application. In this paper, we have studied for parallel-parallel input and single output (PPI-SO), parallel-parallel input and multiple output (PPI-MO) and parallel-parallel fixed input and multiple output (PFI-MO) matrix-matrix multiplication. It is also a well-known fact that the multiplier and adder unit forms an integral part of matrix multiplication. Due to this regard, high speed multiplier and adder become the need of the day. In this paper, we have studied of Vedic mathematics multiplier using compressors.

References
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Index Terms

Computer Science
Information Sciences

Keywords

Parallel-Parallel Input and Single Output (PPI-SO) Parallel-Parallel Input and Multiple Output (PPI-MO) Matrix Multiplication (MM)