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Reseach Article

Review of SOI MOSFET Design and Fabrication Parameters and its Electrical Characteristics

by Shakti Verma, Mohd. Abdullah
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 130 - Number 17
Year of Publication: 2015
Authors: Shakti Verma, Mohd. Abdullah
10.5120/ijca2015906711

Shakti Verma, Mohd. Abdullah . Review of SOI MOSFET Design and Fabrication Parameters and its Electrical Characteristics. International Journal of Computer Applications. 130, 17 ( November 2015), 1-7. DOI=10.5120/ijca2015906711

@article{ 10.5120/ijca2015906711,
author = { Shakti Verma, Mohd. Abdullah },
title = { Review of SOI MOSFET Design and Fabrication Parameters and its Electrical Characteristics },
journal = { International Journal of Computer Applications },
issue_date = { November 2015 },
volume = { 130 },
number = { 17 },
month = { November },
year = { 2015 },
issn = { 0975-8887 },
pages = { 1-7 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume130/number17/23298-2015906711/ },
doi = { 10.5120/ijca2015906711 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T23:25:51.041271+05:30
%A Shakti Verma
%A Mohd. Abdullah
%T Review of SOI MOSFET Design and Fabrication Parameters and its Electrical Characteristics
%J International Journal of Computer Applications
%@ 0975-8887
%V 130
%N 17
%P 1-7
%D 2015
%I Foundation of Computer Science (FCS), NY, USA
Abstract

In current scenario the device count in an IC is running into billions per chip, the issue of power dissipation in the chip is becoming too critical. Due to decreasing device dimension the performance of the bulk Si MOSFET is limited by its fundamental physical limitation like reduction in carrier mobility due to impurities, p-n junction leakage current increases as the junction become more and more shallow and increasing gate tunneling effect as the gate oxide thickness decreases. These requirements have led to development of alternating technology. SOI (silicon on insulator) technology is an alternative choice of Conventional Technology which offers the performance as may be expected from the next generation technology. SOI technology offers significant advantages in fabrication, design and performance for many semiconductor circuits such as excellent isolation, radiation hardness, improved latch up free operation, reduced short channel effects, improved switching speeds and reduced leakage current, due to reduction in the drain-body capacitance. The reduction in the parasitic capacitances provides improved switching speed and superior performance. This paper is focused on the brief of SOI MOSFET Technology, its characteristics, advantages and disadvantages of it.

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Index Terms

Computer Science
Information Sciences

Keywords

SOI MOSFET CMOS wafer Silicon Insulator