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Full adder Design using Hybrid Technology

by Ankita Gupta, Rajeev Thakur
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 130 - Number 7
Year of Publication: 2015
Authors: Ankita Gupta, Rajeev Thakur
10.5120/ijca2015907029

Ankita Gupta, Rajeev Thakur . Full adder Design using Hybrid Technology. International Journal of Computer Applications. 130, 7 ( November 2015), 25-27. DOI=10.5120/ijca2015907029

@article{ 10.5120/ijca2015907029,
author = { Ankita Gupta, Rajeev Thakur },
title = { Full adder Design using Hybrid Technology },
journal = { International Journal of Computer Applications },
issue_date = { November 2015 },
volume = { 130 },
number = { 7 },
month = { November },
year = { 2015 },
issn = { 0975-8887 },
pages = { 25-27 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume130/number7/23220-2015907029/ },
doi = { 10.5120/ijca2015907029 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T23:24:43.726339+05:30
%A Ankita Gupta
%A Rajeev Thakur
%T Full adder Design using Hybrid Technology
%J International Journal of Computer Applications
%@ 0975-8887
%V 130
%N 7
%P 25-27
%D 2015
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Full Adder is a fundamental element that is used in all the processor for not only in ALU but in various part of the chipset. The work proposes a Hybrid design methodology to contribute the requirements for the designing of full adder with reduced delay. The Analysis of the designed full adder is done at 270C and 700C temperature range in CMOS 120 nm, 90 nm, and 50 nm technologies using Microwind tool. The result shows the comparison between different CMOS technologies in terms of delay and power dissipation. A comparison is also done in terms of delay of the designed adder with previously known adder cells, which shows the advantage of the proposed design.

References
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Index Terms

Computer Science
Information Sciences

Keywords

Full Adder Hybrid design Transmission gate (TG) CMOS technologies pass transistor logic (PTL) power delay product (PDP) arithmetic and logic unit (ALU).

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