CFP last date
20 May 2024
Call for Paper
June Edition
IJCA solicits high quality original research papers for the upcoming June edition of the journal. The last date of research paper submission is 20 May 2024

Submit your paper
Know more
The week's pick
Responsive image
Enhancing Privacy Preservation: Multi-Attribute Protection with P-Sensitive K-Anonymity

Twinkle Patel Kiran Amin
Random Articles
Reseach Article

Current Comparison based Domino with Clamped Bit-Line Current Amplifier for Wide Fan-In Gates

by K. Sangeetha, V. Venmathi, P. Ramya, B. Kalaimathi
journal cover thumbnail

International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 137 - Number 5
Year of Publication: 2016
Authors: K. Sangeetha, V. Venmathi, P. Ramya, B. Kalaimathi
10.5120/ijca2016907944

K. Sangeetha, V. Venmathi, P. Ramya, B. Kalaimathi . Current Comparison based Domino with Clamped Bit-Line Current Amplifier for Wide Fan-In Gates. International Journal of Computer Applications. 137, 5 ( March 2016), 1-3. DOI=10.5120/ijca2016907944

@article{ 10.5120/ijca2016907944,
author = { K. Sangeetha, V. Venmathi, P. Ramya, B. Kalaimathi },
title = { Current Comparison based Domino with Clamped Bit-Line Current Amplifier for Wide Fan-In Gates },
journal = { International Journal of Computer Applications },
issue_date = { March 2016 },
volume = { 137 },
number = { 5 },
month = { March },
year = { 2016 },
issn = { 0975-8887 },
pages = { 1-3 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume137/number5/24268-2016907944/ },
doi = { 10.5120/ijca2016907944 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T23:37:31.463124+05:30
%A K. Sangeetha
%A V. Venmathi
%A P. Ramya
%A B. Kalaimathi
%T Current Comparison based Domino with Clamped Bit-Line Current Amplifier for Wide Fan-In Gates
%J International Journal of Computer Applications
%@ 0975-8887
%V 137
%N 5
%P 1-3
%D 2016
%I Foundation of Computer Science (FCS), NY, USA
Abstract

A greater part of the low power design methodology is allocated for reducing leakage current. This plays a vital role in static power dissipation. In this project, a current comparison domino pull-up network with its worst case leakage current is compared with Current comparison based Domino (CCD) with Clamped bit-line Current-sensing Amplifier circuit. Thus, the contention current and consequently power consumption and delay are reduced. The leakage current is also decreased by utilizing the footer transistor in diode configuration, which results in increased noise immunity. The simulation results of wide fan-in gates designed using a 16-nm high-performance predictive technology model demonstrates 46 % power reduction and at least 2.36× noise-immunity improvement at the same delay compared to the standard domino circuits for wide fan – in OR gates.

References
  1. Ali Peiravi and Mohammad Asyaei, “Current-Comparison-Based Domino: New Low Leakage High-Speed Domino Circuit for Wide Fan-In Gates”, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS.
  2. H. Mahmoodi and K. Roy, “Diode-footed domino: A leakage-tolerant, high fan-in dynamic circuit design style,” IEEE Trans. Circuits Syst. I,Reg. Papers, vol. 51, no. 3, pp. 495–503, Mar. 2004.
  3. A. Alvandpour, R. Krishnamurthy, K. Sourrty, and S. Y. Borkar, “A sub-130-nm conditional-keeper technique,” IEEE J. Solid-State Circuits,vol. 37, no. 5, pp. 633–638, May 2002.
  4. M. H. Anis, M. W. Allam, and M. I. Elmasry, “Energy-efficient noise-tolerant dynamic styles for scaled-down CMOS and MTCMOStechnologies,” IEEE Trans. Very Large Scale (VLSI) Syst., vol. 10, no. 2, pp. 71–78, Apr. 2002.
  5. Y. Lih, N. Tzartzanis, and W. W. Walker, “A leakage current replica keeper for dynamic circuits,” IEEE J. Solid-state Circuits, vol. 42, no. 1, pp. 48–55, Jan. 2007.
  6. A. Peiravi and M. Asyaei, “Robust low leakage controlled keeper by current-comparison domino for wide fan-in gates, integration,” VLSI J., vol. 45, no. 1, pp. 22–32, 2012.
  7. H. Suzuki, C. H. Kim, and K. Roy, “Fast tag comparator using diode partitioned domino for 64-bit microprocessors,” IEEE Trans. Circuits Syst., vol. 54, no. 2, pp. 322–328, Feb. 2007.
  8. T.N. Blalock and R. C. Jaeger, “A High-Speed Clamped Bit-Line Current-Mode Sense Amplifier, IEEE Journal of Solid-State Circuits Vol. 26, no. 4, pp. 542 – 548, May 1991.
Index Terms

Computer Science
Information Sciences

Keywords

Clamped bit-line Current Sense Amplifier Domino Logic.

Powered by PhDFocusTM