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Simulation of a Nanoscale SOI TG n-FinFET

by Nour El Islam Boukortt, Baghdad Hadri, Alina Caddemi
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 138 - Number 8
Year of Publication: 2016
Authors: Nour El Islam Boukortt, Baghdad Hadri, Alina Caddemi
10.5120/ijca2016908981

Nour El Islam Boukortt, Baghdad Hadri, Alina Caddemi . Simulation of a Nanoscale SOI TG n-FinFET. International Journal of Computer Applications. 138, 8 ( March 2016), 10-14. DOI=10.5120/ijca2016908981

@article{ 10.5120/ijca2016908981,
author = { Nour El Islam Boukortt, Baghdad Hadri, Alina Caddemi },
title = { Simulation of a Nanoscale SOI TG n-FinFET },
journal = { International Journal of Computer Applications },
issue_date = { March 2016 },
volume = { 138 },
number = { 8 },
month = { March },
year = { 2016 },
issn = { 0975-8887 },
pages = { 10-14 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume138/number8/24397-2016908981/ },
doi = { 10.5120/ijca2016908981 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T23:39:07.856003+05:30
%A Nour El Islam Boukortt
%A Baghdad Hadri
%A Alina Caddemi
%T Simulation of a Nanoscale SOI TG n-FinFET
%J International Journal of Computer Applications
%@ 0975-8887
%V 138
%N 8
%P 10-14
%D 2016
%I Foundation of Computer Science (FCS), NY, USA
Abstract

The objective of this work is to study the electrical characteristics of a nanoscale SOI Tri-Gate n-channel fin field-effect transistor (FinFET) structure with 8 nm gate length using Semiconductor TCAD tools. ATLAS™ tools are computer programs which allow for the creation, fabrication, and simulation of semiconductor devices in three dimensions with different models under consideration. The drain current, transconductance, threshold voltage, subthreshold slope, leakage current, drain induced barrier lowering, and IOn/IOff current ratio are analyzed in the various biasing configuration. In addition, FinFET device with a high value of gate dielectric constant exhibits much better performance compared to the Si3N4 dielectric material, which is desirable for high performance low-power/low-voltage applications. It is found that increasing the high-k value was beneficial in reducing the subthreshold slope, DIBL, and leakage current.

References
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Index Terms

Computer Science
Information Sciences

Keywords

Device scaling FinFET SCEs Leakage current Silvaco Software.

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