Call for Paper - January 2023 Edition
IJCA solicits original research papers for the January 2023 Edition. Last date of manuscript submission is December 20, 2022. Read More

Implementation of Sequence Generator by the Sequential Elements (D-Flip Flop) of Reversible Gates

Print
PDF
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Year of Publication: 2016
Authors:
Shefali Mamataj, Saravanan Chandran, Biswajit Das
10.5120/ijca2016909429

Saravanan Chandran Shefali Mamataj and Biswajit Das. Implementation of Sequence Generator by the Sequential Elements (D-Flip Flop) of Reversible Gates. International Journal of Computer Applications 141(1):33-37, May 2016. BibTeX

@article{10.5120/ijca2016909429,
	author = {Shefali Mamataj, Saravanan Chandran and Biswajit Das},
	title = {Implementation of Sequence Generator by the Sequential Elements (D-Flip Flop) of Reversible Gates},
	journal = {International Journal of Computer Applications},
	issue_date = {May 2016},
	volume = {141},
	number = {1},
	month = {May},
	year = {2016},
	issn = {0975-8887},
	pages = {33-37},
	numpages = {5},
	url = {http://www.ijcaonline.org/archives/volume141/number1/24750-2016909429},
	doi = {10.5120/ijca2016909429},
	publisher = {Foundation of Computer Science (FCS), NY, USA},
	address = {New York, USA}
}

Abstract

Power dissipation is a significant factor in the field of today’s electrical or electronic designing. The most promising substitute to these issues is the reversible computing. The reversible circuits do not dissipate energy as much as irreversible circuits. The reversible circuits do not lose information and can also produce unique outputs from the specific inputs and vice versa. So in the view point of designing issues reversible logic is the most important field of research having applications in low power computing, quantum computing, optical computing, and other emerging computing technologies, bioinformatics and nanotechnology based systems. This paper proposes a new reversible gate and its various classical operations. Furthermore negative and positive edge triggered D flip-flop has been represented by using this reversible gate. Afterwards different sequence generators by the sequential elements of reversible gates (SGSERG) have been implemented for the generation of specific sequence. Sequence Generator is a circuit that generates a desired sequence of bits in synchronization with a clock and it is useful in the various fields of real life applications. A comparison has also been made for the D flip flop represented here to the existing D flip flop reported in the literature in terms of the number of reversible gates, constant input, garbage output and total logical calculation in this paper.

References

  1. Landauer. R., “Irreversibility and heat generation in the computing process”, IBM J.Research and Development, 5 (3): 183‐191, 1961.
  2. C. H. Bennett, “Logical reversibility of computation”, IBM J. Research and Development, 17:pp. 525-532, November 1973.
  3. Rakshith Saligram and Rakshith T R, “Novel Code Converter employing Reversible Logic”, IJCA, Vol 52, No. 18, Aug 2012..
  4. Md. Saiful Islam et.al, “Synthesis of fault tolerant Reversible logic”, IEEE 2009.
  5. R.Feynman, “Quantum Mechanical Computers”, Optical News, pp-11-20, 1985.
  6. B.Parhami; “Fault Tolerant Reversible Circuits” Proc. 40th Asilomar, Conf. Signals,Systems, and Computers, Pacific Grove, CA, Oct. 2006.
  7. Fredkin, T. Toffoli, “Conservative Logic”, International Journal of Theor. Physics, 21, pp. 219-253, 1982.
  8. T.Toffoli.,“Reversible Computing”, Tech memo MIT/LCS/TM-151,MIT Lab for Computer Science , 1980.
  9. Md. M. H Azad Khan, “Design of Full-adder With Reversible Gates”, International Conference on Computer and Information Technology, Dhaka, Bangladesh, pp.515-519, 2002.
  10. Peres, A., “Reversible logic and quantum computers, Physical Review”, vol 32 (6),pp- 3266-3276, 1985.
  11. Ashis Kumer Biswas, Lafifa Jamal, M. A. Mottalib1, Hafiz Md. Hasan Babu.” Design of a Reversible Parallel Loading Shift Register ”.Dhaka Univ. J.Eng & Tech. Vol 1(2) 1-5,2011.
  12. Himanshu Thapliyal, M.B.Srinivas, and M.Zwolinski, "A Beginning in the Reversible Logic Synthesis of Sequential Circuits “,MAPLD Conference (NASA office of Logic Design ), vol.8 2005.
  13. Md. Belayet Ali , Md. Mosharof Hossin and Md. Eneyat Ullah, “Design of Reversible Sequential Circuit Using Reversible Logic Synthesis”, International Journal of VLSI design & Communication Systems (VLSICS) Vol.2, No.4, December 2011.
  14. Md. Selim Al Mamun, Syed Monowar Hossain, “Design of Reversible Random Access Memory”, International Journal of Computer Applications (0975 – 8887) Volume 56– No.15, October 2012 .
  15. Lafifa Jamal, Farah Sharmin, Md. Abdul Mottalib, Hafiz Md. Hasan Babu, “Design and Minimization of Reversible Circuits for a Data Acquisition and Storage System”, International Journal of Engineering and Technology ,Volume 2 No. 1, pp-9-15,January, 2012.

Keywords

Reversible Logic reversible gate, garbage, flip-flop, sequence generator, quantum cost,