CFP last date
20 May 2024
Call for Paper
June Edition
IJCA solicits high quality original research papers for the upcoming June edition of the journal. The last date of research paper submission is 20 May 2024

Submit your paper
Know more
The week's pick
Responsive image
Enhancing Privacy Preservation: Multi-Attribute Protection with P-Sensitive K-Anonymity

Twinkle Patel Kiran Amin
Random Articles
Reseach Article

Capability Aware Dynamic Load Balancer for Asymmetric NUMA Multicore Processors

by D.A. Mehta, Priyesh Kanungo
journal cover thumbnail

International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 183 - Number 13
Year of Publication: 2021
Authors: D.A. Mehta, Priyesh Kanungo
10.5120/ijca2021921433

D.A. Mehta, Priyesh Kanungo . Capability Aware Dynamic Load Balancer for Asymmetric NUMA Multicore Processors. International Journal of Computer Applications. 183, 13 ( Jul 2021), 20-28. DOI=10.5120/ijca2021921433

@article{ 10.5120/ijca2021921433,
author = { D.A. Mehta, Priyesh Kanungo },
title = { Capability Aware Dynamic Load Balancer for Asymmetric NUMA Multicore Processors },
journal = { International Journal of Computer Applications },
issue_date = { Jul 2021 },
volume = { 183 },
number = { 13 },
month = { Jul },
year = { 2021 },
issn = { 0975-8887 },
pages = { 20-28 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume183/number13/31987-2021921433/ },
doi = { 10.5120/ijca2021921433 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-07T01:16:42.099397+05:30
%A D.A. Mehta
%A Priyesh Kanungo
%T Capability Aware Dynamic Load Balancer for Asymmetric NUMA Multicore Processors
%J International Journal of Computer Applications
%@ 0975-8887
%V 183
%N 13
%P 20-28
%D 2021
%I Foundation of Computer Science (FCS), NY, USA
Abstract

The different cores of state-of-the artmulticore processors are performance asymmetric: they are different in terms of their clock speeds and other capabilities. Such heterogeneous multicore processors pose challenges to existing Dynamic Load Balancers in achievingoptimum performance.A load balancer taking the load balancing related decisions assuming all cores to be homogeneous, introduces unnecessary overheads of time, does not exploit the capabilities of higher performance cores, and consequently fails to achieve the possible performance improvement.We, therefore, propose a Capability Aware Dynamic Load Balancer which performs efficient load balancing for asymmetric multicore processors by addressing the aforesaid issues. Considering the difference in clock speeds as the heterogeneity among different cores, the proposed load balancer improves the Turn Around Time of processes significantly as compared to Asymmetry unaware linux load balancer. The results of experimentation exhibit the performance gain in the range of 4-9%, for three different multicore systems having 32, 64 and 128 cores respectively.

References
  1. Martin J. Bligh, M. Dobson, D. Hart, and G. Hu Lzenga, “Linux on NUMA Systems,” Linux Symposium, Vol. 1, 2004, pp. 89-102.
  2. Quan Chen, and Minyi Guo, “Dynamic Load Balancing for Asymmetric Multi-core Architecture,” Book Chapter in book: Task Scheduling for Multi-core and Parallel Architectures, November 2017, pp 113-151.
  3. Mei-Ling Chiang, Shu-Wei Tu, Wei-Lun Su, and Chen-Wei Lin, “Enhancing Inter-Node Process Migration for Load Balancing on Linux-Based NUMA Multicore Systems,” IEEE 42nd Annual Computer Software and Applications Conference (COMPSAC), July 2018.
  4. Keng-Mao Cho, Chun-Wei Tsai, Yi-Shiuan Chiu, and Chu-Sing Yang, “A High Performance Load Balance Strategy for Real-Time Multicore Systems,” Research Article, Scientific World Journal Volume 2014, 14th April 2014.
  5. M. Correa, R. Chanin, A. Sales, R. Scheer, and A. Zorzo, “Multilevel Load Balancing in NUMA Computers,” Technical Report No. 49, PPGCC-FACIN-PUCRS, Brazil, July 2005.
  6. Alexandra Fedorova, “Operating System Scheduling for Chip Multithreaded Processors,” Ph.D. Thesis, Harvard University Cambridge, Massachusetts, September, 2006.
  7. Erich Focht, Mathew Dobson, Patricia Gaughen, and Michael Hohnbaum, “Linux Support for NUMA Hardware,” Linux Symposium, July 2003.
  8. S. Hofmeyr, C. Iancu, and F. Blagojevi, “Load Balancing on Speed,” Proc. of 15th ACM SIGPLAN Symposiumon Principles and practice of parallel programming (PPoPP '10), New York, USA, 2010, pp. 147-158.
  9. Weiwei Jia,  “How does load balancing work inside of operating systems, Linux as an example,” Available: https://www.systutorials.com/load-balancing-work-internal-operating-systems/, June 10, 2020.
  10. M. Tim Jones, “Inside the Linux Scheduler,” Available: www.ibm.com, June 2006.
  11. Changdae Kim, and Jaehyuk Huh, “Exploring the Design Space of Fair Scheduling Supports for Asymmetric Multicore Systems,” IEEE Transactions on Computers , January 2018, pp(99):1-1.
  12. B. Lepers, V. Qu´ema, and A. Fedorova, “Thread and memory placement on NUMA systems: asymmetry matters”, in Proceedings ofUsenix Annual Technical Conference, USENIX ATC ’15, 2015.
  13. Tong Li, D. Baumberger, D. A. Koufaty, and S. Hahn, ‘‘Efficient Operating System Scheduling for Performance-Asymmetric Multi-Core Architectures,’’ Proc. of ACM/IEEE Conf. on Supercomputing, Nov. 2007, pp. 1–11.
  14. Geunsik Lim, Changwoo Min, and Younglk Eom, “Load-Balancing for Improving User Responsiveness on Multicore Embedded Systems,” Linux Symposium, 2012.
  15. Ye Liu, Shinpei Kato, and Masato Edahiro, “Optimization of the Load Balancing Policy for Tiled Many- Core Processors,” IEEE Access Journal, Dec. 2018.
  16. Robert Love, “Linux Kernel Development,” Novell Press, 2nd edition, Jan. 2005.
  17. Jean-Pierre Lozi, Baptiste Lepers, Justin Funston, Fabien Gaud, Vivien Qu´ema, and Alexandra Fedorova, “The Linux Scheduler: a Decade of Wasted Cores,” EuroSys ’16, London, UK, April 18 - 21, 2016.
  18. N. Padhy, A. Panda, and S.P. Patro, “A Cyclic Scheduling for Load Balancing on Linux in Multi-core Architecture,” in Proc. Third International Conference onSmart Computing and Informatics, 2019, pp. 369-378.
  19. Shreelekha Pandey, “Simulator for Linux Scheduler and Load Balancer for NUMA Multiprocessor Architectures,” M.E. Dissertation, S.G.S.I.T.S., 2009.
  20. Shreelekha Pandey, D.A. Mehta, “Simulator of NUMA Multiprocessor Environment & Linux Load Balancing Scheduler,” IJCEE, Dec. 2013.
  21. L. L. Pilla et al., ‘‘A Hierarchical Approach for Load Balancing on Parallel Multi-Core Systems,’’ in Proc. 41st Int. Conf. Parallel Process (ICPP), Sep. 2012, pp. 118–127.
  22. Kishore Kumar Pusukuri, Rajiv Gupta, and Laxmi N. Bhuyan, “Tumbler: An Effective Load Balancing Technique for MultiCPU Multicore Systems,” ACM Transactions on Architecture and Code Optimization, Vol 160, Springer, Singapore, January 2015.
  23. Suresh Siddha, “sched: new sched domain for representing multicore,” Available:http://lwn.net/ Articles/ 169277 /
  24. Mukesh Singhal, and Niranjan G. Shivaratri, “Advanced Concepts in Operating Systems,” Mcgraw Hill International, 1994.
  25. Ian K. T. Tan, Ian Chai, and Poo Kuan Hoong, “An Adaptive Task-Core Ratio Load Balancing Strategy for Multi-core Processors,” International Journal of Computer and Electrical Engineering, Vol. 3, No. 5, October 2011.
  26. Priyesh Kanungo, “Contributions in Dynamic Load Balancing Techniques for Distributed Computing Environment,” Ph.D. Thesis, IET-DAVV, Computer Engg., 2007.
  27. Linux Kernel Documentation [Online]. Available:https://www.kernel.org/doc/html/latest/
Index Terms

Computer Science
Information Sciences

Keywords

Dynamic Load Balancing DLB Load Balancer NUMA Speed Core

Powered by PhDFocusTM