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Reseach Article

Crosstalk Delay Avoidance in Long on Chip Buses by using different Fibonacci CODEC Techniques

Published on December 2015 by Savitha A.c, Siddesh.g.k
National Conference on Power Systems and Industrial Automation
Foundation of Computer Science USA
NCPSIA2015 - Number 4
December 2015
Authors: Savitha A.c, Siddesh.g.k
818054e0-e6b5-4d67-9c52-66327cc863de

Savitha A.c, Siddesh.g.k . Crosstalk Delay Avoidance in Long on Chip Buses by using different Fibonacci CODEC Techniques. National Conference on Power Systems and Industrial Automation. NCPSIA2015, 4 (December 2015), 10-13.

@article{
author = { Savitha A.c, Siddesh.g.k },
title = { Crosstalk Delay Avoidance in Long on Chip Buses by using different Fibonacci CODEC Techniques },
journal = { National Conference on Power Systems and Industrial Automation },
issue_date = { December 2015 },
volume = { NCPSIA2015 },
number = { 4 },
month = { December },
year = { 2015 },
issn = 0975-8887,
pages = { 10-13 },
numpages = 4,
url = { /proceedings/ncpsia2015/number4/23348-7277/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 National Conference on Power Systems and Industrial Automation
%A Savitha A.c
%A Siddesh.g.k
%T Crosstalk Delay Avoidance in Long on Chip Buses by using different Fibonacci CODEC Techniques
%J National Conference on Power Systems and Industrial Automation
%@ 0975-8887
%V NCPSIA2015
%N 4
%P 10-13
%D 2015
%I International Journal of Computer Applications
Abstract

In this work, a CODEC design to eliminate/reduce the propagation delay across long on chip buses which are increasingly becoming a limiting factor in high-speed design has been proposed. Crosstalk between adjacent wires are transitioning in opposite direction create a significant portion of this delay. The coding scheme is based on the Fibonacci numeral system. The proposed CODEC design is efficient and a modular technique. Encoding and decoding algorithms are proposed for three different Fibonacci techniques. The experimental results show that the proposed CODEC reduces crosstalk delay when compared to that of existing approaches. The implementation has been done in verilog code. These codes were synthesized and verified using Cadence Encounter RTL compiler tool with geometries at 180nm.

References
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Index Terms

Computer Science
Information Sciences

Keywords

Crosstalk Fibonacci Codec On Chip Bus