In this paper, the design of a CORDIC algorithm based radix-8 FFT processor is presented for real-time harmonic analyzer. The actual need of FFT is the obtaining a levels of harmonics in power signal. Generally the radix-8 FFT processor is a twiddle factor based butterfly computation. At each stage of the butterfly the twiddle factor is multiplied with the input sequence and each stage required a RAM to store the twiddle factor angles. The choice of the CORDIC algorithm for realizing butterfly operation for FFT which eliminates the need for storing twiddle factors and angles saves a lot of hardware compared to its counterparts employing other techniques. The importance of radix -8 FFT compare with radix-2 and radix-4 it's taking less calculation resources. The total CORDIC based radix-8 FFT is implemented in a field programmable gate array (FPGA) that is characteristic of high efficiency, low cost, convenient implementation and short development cycle, and its performance is found to be satisfactory. . A dual-port memory structure and the corresponding addressing scheme are used to realize the in place data access. The address generation unit required for fetching data from and writing results into the dual-port memory in proper sequence is also incorporated within the chip which houses the controller as well. The full design is implementing using XILINX Vertex4 series.

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Cordic Radix-8 Fft Fpga