CFP last date
20 May 2024
International Journal of Computer Applications
A Publication of Foundation of Computer Science
Scholarly peer reviewed publication
Home
Archives
About Us
The Model
Indexing, Abstracting, and Archiving
Editorial Board
Review Board
Associate Editorial Board
Policy on Publication Ethics
Vision & Mission
Publication Ethics and Malpractice Statement
For Authors
Call for Paper - Submission Open
Topics
Journal Prints
Article Correction Policy
Publishing practices
IJCA Frequently Asked Queries
Authors Self-Archiving Policy
Citation Improvement
Home
Proceedings
National Conference on VLSI and Embedded Systems
Number 1
Call for Paper
June Edition
IJCA solicits high quality original research papers for the upcoming June edition of the journal. The last date of research paper submission is 20 May 2024
Submit your paper
Know more
The week's pick
Enhancing Privacy Preservation: Multi-Attribute Protection with P-Sensitive K-Anonymity
Twinkle Patel
Kiran Amin
Random Articles
Feasible Study on Pattern Matching Algorithms based on Intrusion Detection Systems
June
2014
Modeling and Economic Analysis of Energy Generation from Biomass Energy
December
2014
M-Pass: Web Authentication Protocol Resistant to Malware and Phishing
April
2014
Performance Analysis on the Effect of Doping Concentration in Copper Indium Gallium Selenide (CIGS) Thin-film Solar Cell
March
2015
National Conference on VLSI and Embedded Systems
Number 1
4 Bit Reconfigurable ALU with Minimum Power and Delay
Authors: B. Lokesh, K. Dushyanth, M. Malathi
Design of Digital Filter using Low Power and Area Efficient SQRT CSLA
Authors: R. Subha, G. Durga
FPGA Implementation of a CORDIC-based Radix-8 FFT Processor for Real-Time Harmonic Analyzer
Authors: Venkata Subbarao Gutta, S. Malarvizhi
Implementation of a High Speed Single Precision Floating Point Unit using Verilog
Authors: Ushasree G, R Dhanabal, Sarat Kumar Sahoo and
Design of GDI based 4-Bit Multiplier using Low Power Adder Cells
Authors: E. J. Priyanka, S. Vanitha, P. C. Rupa, N. Arun Kumar, B. Vigneshraja
Design of High Speed Array Multiplier using BiCMOS Logic for Driving Large Load
Authors: G. Rajeshwari, Anjo. C. A, N. Arun Kumar
An Interconnectivity based Efficient Partitioning Algorithm of Combinational CMOS Circuits
Authors: Milon Mahapatra, M. Malathi, B. Srinath
Comparative analysis of Clock gated Data Look Ahead and Conditional Capture Flip-Flops and their area of Applications
Authors: S. Vinoth Kumar, P. Rajshekar, A. Parvathi Karthica, M. Malathi