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Modeling and Performance Evaluation of 2D and 3D NoCs using Discrete Event Simulation

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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Year of Publication: 2016
Authors:
Nejib Mediouni, Samir Ben Abid, Oussama Kallel, Salem Hasnaoui
10.5120/ijca2016908852

Nejib Mediouni, Samir Ben Abid, Oussama Kallel and Salem Hasnaoui. Article: Modeling and Performance Evaluation of 2D and 3D NoCs using Discrete Event Simulation. International Journal of Computer Applications 137(12):1-7, March 2016. Published by Foundation of Computer Science (FCS), NY, USA. BibTeX

@article{key:article,
	author = {Nejib Mediouni and Samir Ben Abid and Oussama Kallel and Salem Hasnaoui},
	title = {Article: Modeling and Performance Evaluation of 2D and 3D NoCs using Discrete Event Simulation},
	journal = {International Journal of Computer Applications},
	year = {2016},
	volume = {137},
	number = {12},
	pages = {1-7},
	month = {March},
	note = {Published by Foundation of Computer Science (FCS), NY, USA}
}

Abstract

Network on Chips are a method of interconnecting Processing Elements, such as processors and communication controllers, through a high scalability interconnect architecture. Planning and implementing NoCs is a complex task, and simulating them at the RTL level is time consuming which has motivated the implementation of a big number of cycle accurate and behavioral simulators. In this paper, we join the effort of NoC simulation platform implementation and we introduce a high level NoC simulation platform that is based on Mathworks Simulink and the SimEvents discrete event simulation engine. We, then, model a 2D and a 3D mesh NoCs using this method and we evaluate their performances. The obtained results are, then, validated using the booksim2 cycle accurate NoC simulator.

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Keywords

2D, 3D NoC, Latency, Throughput